Am Donnerstag, den 23.03.2017, 17:56 +0100 schrieb gianluca: > On 03/23/2017 04:15 PM, Lucas Stach wrote: > > Hi, > > > > Am Donnerstag, den 23.03.2017, 16:04 +0100 schrieb gianluca: > >> Hello, > >> I was looking around to have a common Barebox binary to bootup two > >> boards based on iMX6 SoC. > >> > >> The PCB are at 99.8% the same. > >> PCB#0 has iMX6QP and a VDDCore of 1.38V (LDO enabled) > >> PCB#1 has iMX6DL and a VDDCore of 1.32V (LDO enabled) > >> > >> I was wondering how other boards (like Nitrogen6x) does for booting. > >> > >> As soon as my boards have the same DDR Memory routing and types, the oly > >> thing I can think is the different memory address space for DDR controller. > > > > Even if the external memory is the same, you need 2 different DRAM > > setups. Quad and DualLite differ in IOMUX setup and maximum DRAM > > frequency, the QuadPlus needs additional setup for the NoC. > > > > So you need two DRAM setup only? And no problem for NoC. Our boards will > have only QuadPlus and DualLite. Do you mean the regular Quad model? The QuadPlus has the NoC. > > >> In fact, the Nitrogen6x boards, differs from the #include of the ddr > >> controller (one is for dual-lite, the other for quad). > > > > For the Nitrogen boards we just build multiple images for different > > SoC/DRAM configurations. This is the easiest and most reliable way of > > dealing with this issue. > > > > So you will have different device-tree .dts file? One for each SoC even > if the pinout are the same? > > In this way, having two DRAM Setups, two IOMUX setup, different DRAM > Frequencies and two device-tree blobs, this leads me to a conclusion: > > -- They are TWO DIFFERENT BOARDS (even the PCB and the pinouts are the same) Well, welcome to the i.MX6 world. :) _______________________________________________ barebox mailing list barebox@xxxxxxxxxxxxxxxxxxx http://lists.infradead.org/mailman/listinfo/barebox
