The function "nand_enable_edo_mode" changed the NAND clk rate, without turning
it off. In this case it is posible to get the following errors:
MXS NAND: Error sending command
MXS NAND: Error sending command
MXS NAND: DMA read error
This can be fixed if the NAND clk is disabled before we change the clk
rate.
Tested with:
nand: NAND device: Manufacturer ID: 0x2c, Chip ID: 0xdc (Micron
MT29F4G08ABADAWP), 512MiB, page size: 2048, OOB size: 64
Signed-off-by: Christian Hemp <c.hemp@xxxxxxxxx>
---
drivers/mtd/nand/nand_mxs.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/mtd/nand/nand_mxs.c b/drivers/mtd/nand/nand_mxs.c
index cba0bee..ce79bca 100644
--- a/drivers/mtd/nand/nand_mxs.c
+++ b/drivers/mtd/nand/nand_mxs.c
@@ -2047,7 +2047,9 @@ static int mxs_nand_enable_edo_mode(struct mxs_nand_info *info)
nand->select_chip(mtd, -1);
/* [3] set the main IO clock, 100MHz for mode 5, 80MHz for mode 4. */
+ clk_disable(info->clk);
clk_set_rate(info->clk, (mode == 5) ? 100000000 : 80000000);
+ clk_enable(info->clk);
dev_dbg(info->dev, "using asynchronous EDO mode %d\n", mode);
--
1.9.1
_______________________________________________
barebox mailing list
barebox@xxxxxxxxxxxxxxxxxxx
http://lists.infradead.org/mailman/listinfo/barebox
