In a quest to support the new Variscite SOM's EEPROM based DDR configuration, I am continuing to try to get all the pieces together. Now that I have the SOM actually booting from IRAM, I am actually trying to get the "real" DDR configuration values out of the EEPROM on the SOM. Which brings me to the next hurdle -- getting early I2C access up and running. Thanks to some pointers from Sascha, I have been working with the fsl_i2c.c code that had already been used for this task on the mpc85xx PPC platform, and while the I2C controller is essentially the same, the clock tree setup, etc. for the iMX6 is quite different. I also have the fsl_i2c.c implementation that Variscite has used in their custom U-Boot and have been looking at it as well -- but it has been changed pretty heavily since U-Boot and barebox diverged. Additionally, I'm not certain that their modified version is actually configuring the I2C clock timing correctly anyway. Finally, I have also been looking at the code in i2c-imx.c to see what, if any, of it could be used, but, unless I am mistaken, it appears that almost everything it depends upon would not yet be available this early in the boot process. So, before I go to a lot more effort, has anyone else created an early access I2C driver for the iMX6, or simple early access clock functions for it (e.g. get_ticks(), get_timebase_clock(), etc.)? I figured it would be worth asking to see if anyone else had ever already dealt with this (before I spent a lot of time potentially recreating something). Thanks in advance, Michael Burkey _______________________________________________ barebox mailing list barebox@xxxxxxxxxxxxxxxxxxx http://lists.infradead.org/mailman/listinfo/barebox
