[PATCH for next 15/15] ARM: phytec-som-imx6: add NOR for phycore-imx6 emmc

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Enable NOR for phyCORE-i.MX6 DualLite and Quad eMMC variants.

Furthermore add an extra 'status = "disabled"' in the flash node.  It
has no functional effect, because the SPI bus node 'ecspi1' is disabled,
too.

Signed-off-by: Stefan Christ <s.christ@xxxxxxxxx>
---
 arch/arm/dts/imx6dl-phytec-phycore-som-emmc.dts | 8 ++++++++
 arch/arm/dts/imx6q-phytec-phycore-som-emmc.dts  | 8 ++++++++
 arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi    | 1 +
 3 files changed, 17 insertions(+)

diff --git a/arch/arm/dts/imx6dl-phytec-phycore-som-emmc.dts b/arch/arm/dts/imx6dl-phytec-phycore-som-emmc.dts
index 834aa2b..fc153a6 100644
--- a/arch/arm/dts/imx6dl-phytec-phycore-som-emmc.dts
+++ b/arch/arm/dts/imx6dl-phytec-phycore-som-emmc.dts
@@ -21,6 +21,10 @@
 	compatible = "phytec,imx6dl-pcm058-emmc", "fsl,imx6dl";
 };
 
+&ecspi1 {
+	status = "okay";
+};
+
 &eeprom {
 	status = "okay";
 };
@@ -42,6 +46,10 @@
 	};
 };
 
+&flash {
+	status = "okay";
+};
+
 &usdhc1 {
 	status = "okay";
 
diff --git a/arch/arm/dts/imx6q-phytec-phycore-som-emmc.dts b/arch/arm/dts/imx6q-phytec-phycore-som-emmc.dts
index 116a18d..74bc09b 100644
--- a/arch/arm/dts/imx6q-phytec-phycore-som-emmc.dts
+++ b/arch/arm/dts/imx6q-phytec-phycore-som-emmc.dts
@@ -20,6 +20,10 @@
 	compatible = "phytec,imx6q-pcm058-emmc", "fsl,imx6q";
 };
 
+&ecspi1 {
+	status = "okay";
+};
+
 &eeprom {
 	status = "okay";
 };
@@ -41,6 +45,10 @@
 	};
 };
 
+&flash {
+	status = "okay";
+};
+
 &usdhc1 {
 	status = "okay";
 
diff --git a/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi b/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi
index 139150e..d446a5e 100644
--- a/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi
+++ b/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi
@@ -46,6 +46,7 @@
 		compatible = "m25p80";
 		spi-max-frequency = <20000000>;
 		reg = <0>;
+		status = "disabled";
 
 		#address-cells = <1>;
 		#size-cells = <1>;
-- 
1.9.1


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