[PATCH 6/6] i.MX6: pci: Avoid aborts when asserting PCIe reset

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When booting Barebox in the HW environment where PCIe core has been
used but not properly shut down, writing to PCIE_PL_PFLR in
imx6_pcie_assert_core_reset would cause data abort exception.

The problem can be easily reproduced on a i.MX6 based board with PCIe
slot populated with some device by doing:

> bootm -f -e 0x1050 <your board's>.img

Ignoring this exception seem to allow PCIe core to successfully
initialize and enumerate devices properly. This is also how Linux
Kernel version of the driver handles this situation -- it installs
dummy no-op abort handler at the beginning of device's probing.

Signed-off-by: Andrey Smirnov <andrew.smirnov@xxxxxxxxx>
---
 drivers/pci/pci-imx6.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/pci/pci-imx6.c b/drivers/pci/pci-imx6.c
index 713007b..3a3edd8 100644
--- a/drivers/pci/pci-imx6.c
+++ b/drivers/pci/pci-imx6.c
@@ -13,6 +13,7 @@

 #include <common.h>
 #include <clock.h>
+#include <abort.h>
 #include <malloc.h>
 #include <io.h>
 #include <init.h>
@@ -237,7 +238,10 @@ static int imx6_pcie_assert_core_reset(struct pcie_port *pp)
 		val = readl(pp->dbi_base + PCIE_PL_PFLR);
 		val &= ~PCIE_PL_PFLR_LINK_STATE_MASK;
 		val |= PCIE_PL_PFLR_FORCE_LINK;
+
+		data_abort_mask();
 		writel(val, pp->dbi_base + PCIE_PL_PFLR);
+		data_abort_unmask();

 		gpr12 &= ~IMX6Q_GPR12_PCIE_CTL_2;
 		writel(gpr12, imx6_pcie->iomuxc_gpr + IOMUXC_GPR12);
--
2.5.0

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