Marvell PXA3xx NAND flash controller IP has been reused in later SoCs
with additional HW features. Add HW BCH ECC as the first known HW
difference.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@xxxxxxxxx>
---
Cc: Robert Jarzmik <robert.jarzmik@xxxxxxx>
Cc: Thomas Petazzoni <thomas.petazzoni@xxxxxxxxxxxxxxxxxx>
Cc: Ezequiel Garcia <ezequiel@xxxxxxxxxxxxxxxxxxxx>
Cc: barebox@xxxxxxxxxxxxxxxxxxx
---
drivers/mtd/nand/nand_mrvl_nfc.c | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/drivers/mtd/nand/nand_mrvl_nfc.c b/drivers/mtd/nand/nand_mrvl_nfc.c
index 5ff5ed72ff49..8a05fc88824b 100644
--- a/drivers/mtd/nand/nand_mrvl_nfc.c
+++ b/drivers/mtd/nand/nand_mrvl_nfc.c
@@ -142,6 +142,8 @@ struct mrvl_nand_host {
size_t read_id_bytes;
void __iomem *mmio_base;
+ unsigned int hwflags;
+#define HWFLAGS_ECC_BCH BIT(0)
unsigned int buf_start;
unsigned int buf_count;
@@ -234,9 +236,12 @@ static struct nand_ecclayout ecc_layout_2KB_hwecc = {
#define mtd_info_to_host(mtd) ((struct mrvl_nand_host *) \
(((struct nand_chip *)((mtd)->priv))->priv))
+const unsigned int pxa3xx_hwflags;
+
static struct of_device_id mrvl_nand_dt_ids[] = {
{
.compatible = "marvell,pxa3xx-nand",
+ .data = &pxa3xx_hwflags,
},
{}
};
@@ -1004,6 +1009,8 @@ static struct mrvl_nand_host *alloc_nand_resource(struct device_d *dev)
static int mrvl_nand_probe_dt(struct mrvl_nand_host *host)
{
struct device_node *np = host->dev->device_node;
+ const struct of_device_id *match =
+ of_match_node(mrvl_nand_dt_ids, np);
of_property_read_u32(np, "num-cs", &host->num_cs);
if (of_get_nand_on_flash_bbt(np))
@@ -1017,6 +1024,8 @@ static int mrvl_nand_probe_dt(struct mrvl_nand_host *host)
if (host->ecc_step < 0)
host->ecc_step = 0;
+ host->hwflags = ((unsigned int *)match->data)[0];
+
return 0;
}
--
2.1.0
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