The current calculation does not take the 0x10000000 offset where
SDRAM starts into account. For example with a 1GiB chip density
the current code calculates cs1 start to 0x40000000, but it
has to be 0x10000000 + 0x40000000 = 0x50000000. Add the missing
8 32MiB chunks.
Signed-off-by: Sascha Hauer <s.hauer@xxxxxxxxxxxxxx>
---
arch/arm/mach-imx/imx6-mmdc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-imx/imx6-mmdc.c b/arch/arm/mach-imx/imx6-mmdc.c
index fb81a15..64fb624 100644
--- a/arch/arm/mach-imx/imx6-mmdc.c
+++ b/arch/arm/mach-imx/imx6-mmdc.c
@@ -1199,7 +1199,7 @@ void mx6_dram_cfg(const struct mx6_ddr_sysinfo *sysinfo,
twtr = ROUND(max(4 * clkper, 7500) / clkper, 1) - 1;
trcd = trp;
trtp = twtr;
- cs0_end = 4 * sysinfo->cs_density - 1;
+ cs0_end = 4 * sysinfo->cs_density - 1 + 8;
debug("density:%d Gb (%d Gb per chip)\n",
sysinfo->cs_density, ddr3_cfg->density);
--
2.1.4
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