DDR_64BIT_2GB corresponds to two chip selects (ncs = 2) with 1GiB each. In this case cs_density must be configured to 8Gb (1GiB). Signed-off-by: Sascha Hauer <s.hauer@xxxxxxxxxxxxxx> --- arch/arm/boards/cm-fx6/lowlevel.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boards/cm-fx6/lowlevel.c b/arch/arm/boards/cm-fx6/lowlevel.c index 9c5c33c..fa8bd7b 100644 --- a/arch/arm/boards/cm-fx6/lowlevel.c +++ b/arch/arm/boards/cm-fx6/lowlevel.c @@ -206,6 +206,8 @@ static void spl_mx6q_dram_init(enum ddr_config dram_config, bool reset) cm_fx6_sysinfo_q.ncs = 1; break; case DDR_64BIT_2GB: + cm_fx6_sysinfo_q.cs_density = 8; + cm_fx6_ddr3_cfg_q.density = 2; cm_fx6_sysinfo_q.dsize = 2; cm_fx6_sysinfo_q.ncs = 2; break; -- 2.1.4 _______________________________________________ barebox mailing list barebox@xxxxxxxxxxxxxxxxxxx http://lists.infradead.org/mailman/listinfo/barebox
