Hello, similar to how the d-cache is cleaned before enabling the same should be done for the i-cache. I'd not consider this series as urgent because of patch 4. I created this series because there was a problem that could have happend because of stale entries in the i-cache, but this proved to be wrong. Still for correctness sake the patch should applied. The other three patches are just minor cleanups that I did on the way to create patch 4. Uwe Kleine-König (4): arm/cpu/lowlevel: add and fix comments for CPSR and SCTLR accesses arm/cpu/lowlevel: Use coprocessor instruction for ARMv7, too arm/cpu/lowlevel: Don't save the return address in another register arm/cpu/lowlevel: invalidate i-cache before enabling arch/arm/cpu/lowlevel.S | 39 +++++++++++++++++++++++++++++---------- 1 file changed, 29 insertions(+), 10 deletions(-) -- 2.1.3 _______________________________________________ barebox mailing list barebox@xxxxxxxxxxxxxxxxxxx http://lists.infradead.org/mailman/listinfo/barebox
