[PATCH 2/3] pci: align bridge windows

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 



The bridge filtering logic needs a minimum
alignment of 1MB for mem and 4KB for io resources.
Take this into account while assigning resources
to devices in oredr to not produce overlapping
windows between different bridges.

Signed-off-by: Lucas Stach <dev@xxxxxxxxxx>
---
 drivers/pci/pci.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 87c2fca..7f8ebcf 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -1,4 +1,5 @@
 #include <common.h>
+#include <sizes.h>
 #include <linux/pci.h>
 
 #ifdef DEBUG
@@ -259,14 +260,17 @@ static void postscan_setup_bridge(struct pci_dev *dev)
 	pci_write_config_byte(dev, PCI_SUBORDINATE_BUS, bus_index - 1);
 
 	if (last_mem)
+		last_mem = ALIGN(last_mem, SZ_1M);
 		pci_write_config_word(dev, PCI_MEMORY_LIMIT,
 				      ((last_mem - 1) & 0xfff00000) >> 16);
 
 	if (last_mem_pref)
+		last_mem_pref = ALIGN(last_mem_pref, SZ_1M);
 		pci_write_config_word(dev, PCI_PREF_MEMORY_LIMIT,
 				      ((last_mem_pref - 1) & 0xfff00000) >> 16);
 
 	if (last_io) {
+		last_io = ALIGN(last_io, SZ_4K);
 		pci_write_config_byte(dev, PCI_IO_LIMIT,
 				((last_io - 1) & 0x0000f000) >> 8);
 		pci_write_config_word(dev, PCI_IO_LIMIT_UPPER16,
-- 
1.9.3


_______________________________________________
barebox mailing list
barebox@xxxxxxxxxxxxxxxxxxx
http://lists.infradead.org/mailman/listinfo/barebox




[Index of Archives]     [Linux Embedded]     [Linux USB Devel]     [Linux Audio Users]     [Yosemite News]     [Linux Kernel]     [Linux SCSI]     [XFree86]

  Powered by Linux