ARM Cortex A8 errata 709718: "Load and store operations to shared device memory regions may not complete in program order" We implement the recommended workaround in the bootloader as it must be applied before enabling the MMU for the first time. Signed-off-by: Lucas Stach <l.stach@xxxxxxxxxxxxxx> --- arch/arm/include/asm/errata.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm/include/asm/errata.h b/arch/arm/include/asm/errata.h index e2ffd87360c0..9525823e4ca8 100644 --- a/arch/arm/include/asm/errata.h +++ b/arch/arm/include/asm/errata.h @@ -12,6 +12,18 @@ * GNU General Public License for more details. */ +static inline void enable_arm_errata_709718_war(void) +{ + __asm__ __volatile__ ( + "mrc p15, 0, r0, c10, c2, 0\n" + "bic r0, #3 << 16\n" + "mcr p15, 0, r0, c10, c2, 0\n" + "mrc p15, 0, r0, c1, c0, 0\n" + "orr r0, r0, #1 << 28\n" + "mcr p15, 0, r0, c1, c0, 0\n" + ); +} + static inline void enable_arm_errata_716044_war(void) { __asm__ __volatile__ ( -- 2.1.1 _______________________________________________ barebox mailing list barebox@xxxxxxxxxxxxxxxxxxx http://lists.infradead.org/mailman/listinfo/barebox