On Wed, 1 Oct 2014 08:17:21 +0200 Sascha Hauer <s.hauer@xxxxxxxxxxxxxx> wrote: > On Thu, Sep 25, 2014 at 10:46:55PM +0200, Lucas Stach wrote: > > Am Donnerstag, den 25.09.2014, 23:02 +0400 schrieb Antony Pavlov: > > > On Thu, 25 Sep 2014 19:04:54 +0200 > > > Lucas Stach <dev@xxxxxxxxxx> wrote: > > > > > > > Ok, I'm sending this out before it gathers any more dust. > > > > > > > > This still doesn't work on Tegra K1 and I also haven't got > > > > around to finish the rtl8169 network driver, but it seems > > > > this pile is already a worthwile improvement. > > > > > > > > First 7 patches are general barebox PCI improvements for > > > > better tracking of PCI resources and handling bridge setup. > > > > > > I have tryed this series. > > > > > > I have got several > > > 'BAR does not fit within bus IO res' > > > messages on qemu-malta. So not all available pci devices were registered. > > > > > I think that's because patch 2 fixes a problem where IO resources would > > be populated from the host controllers MEM resource. IO resources are > > now properly accounted. > > > > From a quick look at the code it seems you aren't properly assigning the > > resource.end for the IO region on malta. Can you please check this? > > Otherwise please post the PCI debug messages. > > How do we proceed with this series? Antony, could you help debugging > this? Lucas is right. Malta's pci controller code assings wrong value for io resource.end. I'm examining correspoinding linux kernel code, but I can't point a source of the problem just now. -- Best regards, Antony Pavlov _______________________________________________ barebox mailing list barebox@xxxxxxxxxxxxxxxxxxx http://lists.infradead.org/mailman/listinfo/barebox
