The fractional part is 4 bit, not 3 Signed-off-by: Sascha Hauer <s.hauer@xxxxxxxxxxxxxx> --- drivers/video/imx-ipu-fb.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/video/imx-ipu-fb.c b/drivers/video/imx-ipu-fb.c index 858bde8..8b43515 100644 --- a/drivers/video/imx-ipu-fb.c +++ b/drivers/video/imx-ipu-fb.c @@ -475,7 +475,7 @@ static int sdc_init_panel(struct fb_info *info, enum disp_data_mapping fmt) } dev_dbg(&info->dev, "pixel clk = %lu, divider %u.%u\n", - pixel_clk, div >> 4, (div & 7) * 125); + pixel_clk, div >> 4, (div & 0xf) * (1000 / 16)); /* * DISP3_IF_CLK_DOWN_WR is half the divider value and 2 fraction bits -- 1.8.5.1 _______________________________________________ barebox mailing list barebox@xxxxxxxxxxxxxxxxxxx http://lists.infradead.org/mailman/listinfo/barebox
