This updates nand timings to at91bootstrap's ones (branch 3.5.x)
With this setting nand flash is properly detected when we boot from SPI
NOR flash.
When booting on SPI NOR, log is now :
nand: ONFI param page 0 valid
nand: ONFI flash detected
nand: NAND device: Manufacturer ID: 0x2c, Chip ID: 0xda (Micron MT29F2G08ABAEAWP), 256MiB, page size: 2048, OOB size: 64
atmel_nand atmel_nand0: Initialize PMECC params, cap: 4, sector: 512
Signed-off-by: Eric Bénard <eric@xxxxxxxxxx>
---
arch/arm/boards/sama5d3xek/init.c | 34 +++++++++++++++++++++-------------
1 file changed, 21 insertions(+), 13 deletions(-)
diff --git a/arch/arm/boards/sama5d3xek/init.c b/arch/arm/boards/sama5d3xek/init.c
index 482c74a..ff62550 100644
--- a/arch/arm/boards/sama5d3xek/init.c
+++ b/arch/arm/boards/sama5d3xek/init.c
@@ -29,8 +29,7 @@
#include <sizes.h>
#include <linux/mtd/nand.h>
#include <mach/board.h>
-#include <mach/at91sam9_smc.h>
-#include <mach/at91sam9_smc.h>
+#include <mach/sama5_smc.h>
#include <gpio.h>
#include <mach/io.h>
#include <mach/iomux.h>
@@ -71,19 +70,28 @@ static struct atmel_nand_data nand_pdata = {
.on_flash_bbt = 1,
};
-static struct sam9_smc_config cm_nand_smc_config = {
- .ncs_read_setup = 0,
- .nrd_setup = 1,
- .ncs_write_setup = 0,
+static struct sama5_smc_config cm_nand_smc_config = {
+ .ncs_read_setup = 1,
+ .nrd_setup = 2,
+ .ncs_write_setup = 1,
.nwe_setup = 1,
- .ncs_read_pulse = 6,
- .nrd_pulse = 4,
- .ncs_write_pulse = 5,
- .nwe_pulse = 3,
+ .ncs_read_pulse = 7,
+ .nrd_pulse = 5,
+ .ncs_write_pulse = 7,
+ .nwe_pulse = 5,
- .read_cycle = 6,
- .write_cycle = 5,
+ .read_cycle = 9,
+ .write_cycle = 8,
+
+ .cle_to_ren_low_delay = 3,
+ .ale_to_data_start = 10,
+ .ale_to_ren_low_delay = 3,
+ .off_chip_memory_scrambling_enable = 0,
+ .ready_to_ren_low_delay = 4,
+ .wen_high_to_ren_to_busy = 5,
+ .ready_busy_line_selection = 3,
+ .nand_flash_selection = 1,
.mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE,
.tdf_cycles = 1,
@@ -102,7 +110,7 @@ static void ek_add_device_nand(void)
cm_nand_smc_config.mode |= AT91_SMC_DBW_8;
/* configure chip-select 3 (NAND) */
- sam9_smc_configure(0, 3, &cm_nand_smc_config);
+ sama5_smc_configure(0, 3, &cm_nand_smc_config);
at91_add_device_nand(&nand_pdata);
}
--
1.8.3.1
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