Before we jump to SDRAM where we just copied our code we have to
invalidate the instruction cache.
Signed-off-by: Sascha Hauer <s.hauer@xxxxxxxxxxxxxx>
---
arch/arm/mach-imx/external-nand-boot.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/mach-imx/external-nand-boot.c b/arch/arm/mach-imx/external-nand-boot.c
index b0aeb43..1af46b7 100644
--- a/arch/arm/mach-imx/external-nand-boot.c
+++ b/arch/arm/mach-imx/external-nand-boot.c
@@ -15,6 +15,7 @@
#include <init.h>
#include <io.h>
#include <linux/mtd/nand.h>
+#include <asm/cache.h>
#include <asm/sections.h>
#include <asm/barebox-arm.h>
#include <asm/barebox-arm-head.h>
@@ -244,6 +245,8 @@ void __bare_init imx_nand_load_image(void *dest, int size, void __iomem *base,
*/
static __bare_init __naked void jump_sdram(unsigned long offset)
{
+ flush_icache();
+
__asm__ __volatile__ (
"sub lr, lr, %0;"
"mov pc, lr;" : : "r"(offset)
--
1.8.4.3
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