Allows us to drop some silly code workaround. Signed-off-by: Lucas Stach <dev@xxxxxxxxxx> --- arch/arm/Kconfig | 1 + arch/arm/mach-tegra/Kconfig | 8 ++++---- arch/arm/mach-tegra/tegra_maincomplex_init.c | 8 +------- 3 files changed, 6 insertions(+), 11 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 398bc90..2ad8f6a 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -173,6 +173,7 @@ config ARCH_TEGRA select GPIO_TEGRA select OFDEVICE select OFTREE + select RELOCATABLE config ARCH_ZYNQ bool "Xilinx Zynq-based boards" diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig index e6d53bc..4164f56 100644 --- a/arch/arm/mach-tegra/Kconfig +++ b/arch/arm/mach-tegra/Kconfig @@ -1,5 +1,9 @@ if ARCH_TEGRA +config ARCH_TEXT_BASE + hex + default 0x0 + choice prompt "Tegra processor type" @@ -46,10 +50,6 @@ endchoice if ARCH_TEGRA_2x_SOC -config ARCH_TEXT_BASE - hex - default 0x00108000 - choice prompt "Tegra 20 Board Type" diff --git a/arch/arm/mach-tegra/tegra_maincomplex_init.c b/arch/arm/mach-tegra/tegra_maincomplex_init.c index 343edd6..c485760 100644 --- a/arch/arm/mach-tegra/tegra_maincomplex_init.c +++ b/arch/arm/mach-tegra/tegra_maincomplex_init.c @@ -36,11 +36,5 @@ void tegra_maincomplex_entry(void) unreachable(); } - /* - * The standard load address for Tegra systems is 0x10800 which means - * the barebox binary will always be below the malloc area for all - * reasonable malloc area sizes. We offset the RAM base address by 8MB - * to pretend barebox is in another bank. - */ - barebox_arm_entry(rambase + SZ_8M, ramsize - SZ_8M, 0); + barebox_arm_entry(rambase, ramsize, 0); } -- 1.8.3.1 _______________________________________________ barebox mailing list barebox@xxxxxxxxxxxxxxxxxxx http://lists.infradead.org/mailman/listinfo/barebox
