On Thu, Jun 06, 2013 at 08:40:46AM -0500, menon.nishanth@xxxxxxxxx wrote:
> On Thu, Jun 6, 2013 at 7:47 AM, Jan Weitzel <j.weitzel@xxxxxxxxx> wrote:
> > +noinline int omap4460_scale_vcores(unsigned vsel0_pin, unsigned volt_mv)
> > +{
> > + void __iomem *base;
> > + u32 val = 0;
> > +
> > + /* For VC bypass only VCOREx_CGF_FORCE is necessary and
> > + * VCOREx_CFG_VOLTAGE changes can be discarded
> > + */
> > + writel(0, OMAP44XX_PRM_VC_CFG_I2C_MODE);
> > + writel(0x6026, OMAP44XX_PRM_VC_CFG_I2C_CLK);
> > +
> > + /* TPS - supplies vdd_mpu on 4460
> > + * Setup SET1 and SET0 with right values so that kernel
> > + * can use either of them based on its needs.
> > + */
> > +
> > + omap4_do_scale_tps62361(TPS62361_REG_ADDR_SET0, volt_mv);
> Just a nitpick - the general rule of TPS+OMAP4460 integration is *NOT*
> to program SET0 register. this is intended to be at boot voltage
> required to be used when reboot due to s/w controlled or h/w watchdog.
So this line should simply be removed?
Ok, this line is only moved and not introduced in this patch, so it
should be fine to apply this patch and leave this for a separate patch.
Sascha
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