Am Freitag, den 01.03.2013, 18:23 +0100 schrieb Sascha Hauer:
> On Fri, Mar 01, 2013 at 10:22:52AM +0100, Lucas Stach wrote:
> > Replace the ad-hoc clocksource implementation with a proper driver for
> > the Tegra 20 timer. This driver is able to do the required hardware
> > initialisation itself.
> >
> > +
> > +static int tegra20_timer_probe(struct device_d *dev)
> > +{
> > + struct clk *timer_clk;
> > + unsigned long rate;
> > +
> > + /* use only one timer */
> > + if (timer_base)
> > + return -EBUSY;
> > +
> > + timer_base = dev_request_mem_region(dev, 0);
> > + if (!timer_base) {
> > + dev_err(dev, "could not get memory region\n");
> > + return -ENODEV;
> > + }
> > +
> > + timer_clk = clk_get(dev, NULL);
> > + if (!timer_clk) {
> > + dev_err(dev, "could not get clock\n");
> > + return -ENODEV;
> > + }
> > +
> > + clk_enable(timer_clk);
> > +
> > + /*
> > + * calibrate timer to run at 1MHz
>
> We don't need the timer to be running at a certain frequency, you can
> just use clocks_calc_mult_shift to calculate the correct values from
> whatever frequency.
Other hardware blocks like the flow controller might assume the timer to
be running at 1MHz. The timer and time register is named US (like usec)
for a reason. It's the officially correct way to initialize this timer
(as documented in the Tegra TRM).
Regards,
Lucas
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