Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@xxxxxxxxxxxx>
---
arch/arm/mach-at91/at91rm9200_devices.c | 3 +++
arch/arm/mach-at91/include/mach/at91rm9200_mc.h | 30 +++++++++++++++++++++++
2 files changed, 33 insertions(+)
diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c
index 84d4c15..0f2ec1f 100644
--- a/arch/arm/mach-at91/at91rm9200_devices.c
+++ b/arch/arm/mach-at91/at91rm9200_devices.c
@@ -25,6 +25,9 @@
void at91_add_device_sdram(u32 size)
{
+ if (!size)
+ size = at91rm9200_get_sdram_size();
+
arm_add_mem_device("ram0", AT91_CHIPSELECT_1, size);
add_mem_device("sram0", AT91RM9200_SRAM_BASE, AT91RM9200_SRAM_SIZE,
IORESOURCE_MEM_WRITEABLE);
diff --git a/arch/arm/mach-at91/include/mach/at91rm9200_mc.h b/arch/arm/mach-at91/include/mach/at91rm9200_mc.h
index d34e4ed..fc44a61 100644
--- a/arch/arm/mach-at91/include/mach/at91rm9200_mc.h
+++ b/arch/arm/mach-at91/include/mach/at91rm9200_mc.h
@@ -157,4 +157,34 @@
#define AT91_BFC_MUXEN (1 << 18) /* Multiplexed Bus Enable */
#define AT91_BFC_RDYEN (1 << 19) /* Ready Enable Mode */
+#ifndef __ASSEMBLY__
+#include <mach/io.h>
+static inline u32 at91rm9200_get_sdram_size(void)
+{
+ u32 cr, mr;
+ u32 size;
+
+ cr = at91_sys_read(AT91_SDRAMC_CR);
+ mr = at91_sys_read(AT91_SDRAMC_MR);
+
+ /* Formula:
+ * size = bank << (col + row + 1);
+ * if (bandwidth == 32 bits)
+ * size <<= 1;
+ */
+ size = 1;
+ /* COL */
+ size += (cr & AT91_SDRAMC_NC) + 8;
+ /* ROW */
+ size += ((cr & AT91_SDRAMC_NR) >> 2) + 11;
+ /* BANK */
+ size = ((cr & AT91_SDRAMC_NB) ? 4 : 2) << size;
+ /* bandwidth */
+ if (!(mr & AT91_SDRAMC_DBW))
+ size <<= 1;
+
+ return size;
+}
+#endif
+
#endif
--
1.7.10.4
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