On Thu, Jun 21, 2012 at 09:01:42PM +0200, Juergen Beisert wrote: > Hi Sascha, > > Sascha Hauer wrote: > > On Thu, Jun 21, 2012 at 11:16:18AM +0200, Juergen Beisert wrote: > > > These are examples how to provide the reset source. Not really tested on > > > the corresponding hardware yet. > > > > I did. On i.MX1 it does not work. The reset source register is not > > inside the watchdog module, but at 0x0021b800 (Reset source register, > > RSR) > > Hmm, in my old MC9328MX1 manual the watchdog register at 0x201008 (=Watchdog > Status Register) reports in bit 0 (=TOUT) if the watchdog timed out. > > But the RSR seems a more reliable source to read the status. > > > On i.MX27 it correctly detects a watchdog reset but not a power on > > reset. On i.MX27 it must be: > > > > # define WDOG_WRSR_EXT (1 << 3) > > # define WDOG_WRSR_PWR (1 << 4) > > Ups, sure. "not really tested"...I told you so ;) > > > i.MX51 does not seem to have a power-on-reset bit, at least not in the > > watchdog module. I didn't check the other i.MXs > > Time for a #ifdef hell? At least the bits do not conflict. The bit which is the POR bit on i.MX27 is reserved on i.MX51. Sascha -- Pengutronix e.K. | | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 | _______________________________________________ barebox mailing list barebox@xxxxxxxxxxxxxxxxxxx http://lists.infradead.org/mailman/listinfo/barebox
