On Thu, May 24, 2012 at 2:58 PM, Eric Bénard <eric@xxxxxxxxxx> wrote:
Hi Roberto,
Le Thu, 24 May 2012 14:49:36 +0200,
Roberto Nibali <rnibali@xxxxxxxxx> a écrit :
> I haven't found a combination of root/rootfstype yet that permits me towell NAND boot + nand rootfs works fine here (cpuimx25) and I assume
> boot from barebox either from NFS, TFTP, MMC/SD or NOR yet. No matter what
> I try, the kernel spits back at me.
>
NAND boot + sd rootfs would work as sd is properly detected during boot.
Yep, I believe it's more a question of me setting the parameters correctly upon boot. But without a proper low level init (which I don't have because I do not really understand all the details of the low level code), there are other factors which could inhibit the proper boot, as you mention below.
> Also I have the problem that my NOR is only detected when using barebox as> .../...
> a second stage boot loader from uboot. If booting from SD into barebox, the
> NOR is not detected. I have added the following changes to figure out
> what's going on:
>
> What's going on here?bad iomux and/or bad WEIM configuration
>
I support WEIM configuration is done in the low level part, isn't it? Where would I find an appropriate example? I have been reading all the fsl board's low_level codes, but have a hard time figuring out how to apply it to my board.
With regard to the IOMUX, I was under the impression that it does not matter much, since after low level code run, the execution path is:
late_initcall()
mem_initcall()
device_initcall() --> add_cfi_flash_device()
console_initcall() --> mxc_iomux_v3_setup_multiple_pads()
core_initcall()
So CFI/NOR detection happens before IOMUX setup, at least that's what I have gathered for my board copying from various other examples in barebox. What would the correct code execution path be from the architectural point of view?
Best regards
Roberto
_______________________________________________ barebox mailing list barebox@xxxxxxxxxxxxxxxxxxx http://lists.infradead.org/mailman/listinfo/barebox
