From: Michael Trensch <MTrensch@xxxxxxxxx> The netX internal UART latches register settings and internally uses them only if written in the correct order. Other orders may work, but sometimes the UART gets stuck, as the baudrate has not correctly been set. Signed-off-by: Michael Trensch <MTrensch@xxxxxxxxx> Acked-by: Juergen Beisert <jbe@xxxxxxxxxxxxxx> --- drivers/serial/serial_netx.c | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/drivers/serial/serial_netx.c b/drivers/serial/serial_netx.c index 2d4ef11..838293f 100644 --- a/drivers/serial/serial_netx.c +++ b/drivers/serial/serial_netx.c @@ -77,10 +77,7 @@ static int netx_serial_init_port(struct console_device *cdev) /* disable uart */ writel(0, base + UART_CR); - - writel(LINE_CR_8BIT | LINE_CR_FEN, base + UART_LINE_CR); - - writel(DRV_ENABLE_TX | DRV_ENABLE_RTS, base + UART_DRV_ENABLE); + writel(BRM_CR_BAUD_RATE_MODE, base + UART_BRM_CR); /* set baud rate */ divisor = 115200 * 4096; @@ -88,9 +85,11 @@ static int netx_serial_init_port(struct console_device *cdev) divisor *= 256; divisor /= 100000; - writel((divisor >> 8) & 0xff, base + UART_BAUDDIV_MSB); writel(divisor & 0xff, base + UART_BAUDDIV_LSB); - writel(BRM_CR_BAUD_RATE_MODE, base + UART_BRM_CR); + writel((divisor >> 8) & 0xff, base + UART_BAUDDIV_MSB); + writel(DRV_ENABLE_TX | DRV_ENABLE_RTS, base + UART_DRV_ENABLE); + + writel(LINE_CR_8BIT | LINE_CR_FEN, base + UART_LINE_CR); /* Finally, enable the UART */ writel(CR_UARTEN, base + UART_CR); -- 1.7.10 _______________________________________________ barebox mailing list barebox@xxxxxxxxxxxxxxxxxxx http://lists.infradead.org/mailman/listinfo/barebox
