Whether the controller works in 8bit mode is not only dependent
on the controller but also on the board having wired up 8 data
lines, so put a capabilities field in platform data.
Signed-off-by: Sascha Hauer <s.hauer@xxxxxxxxxxxxxx>
---
arch/arm/mach-imx/include/mach/esdhc.h | 2 ++
drivers/mci/imx-esdhc.c | 6 +++++-
2 files changed, 7 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-imx/include/mach/esdhc.h b/arch/arm/mach-imx/include/mach/esdhc.h
index aaf9748..b4c1aa9 100644
--- a/arch/arm/mach-imx/include/mach/esdhc.h
+++ b/arch/arm/mach-imx/include/mach/esdhc.h
@@ -32,6 +32,7 @@ enum cd_types {
* @cd_gpio: gpio for card_detect interrupt
* @wp_type: type of write_protect method (see wp_types enum above)
* @cd_type: type of card_detect method (see cd_types enum above)
+ * @caps: supported bus width capabilities (MMC_MODE_4BIT | MMC_MODE_8BIT)
*/
struct esdhc_platform_data {
@@ -39,5 +40,6 @@ struct esdhc_platform_data {
unsigned int cd_gpio;
enum wp_types wp_type;
enum cd_types cd_type;
+ unsigned caps;
};
#endif /* __ASM_ARCH_IMX_ESDHC_H */
diff --git a/drivers/mci/imx-esdhc.c b/drivers/mci/imx-esdhc.c
index d36d211..c6f2d5c 100644
--- a/drivers/mci/imx-esdhc.c
+++ b/drivers/mci/imx-esdhc.c
@@ -511,6 +511,7 @@ static int fsl_esdhc_probe(struct device_d *dev)
struct mci_host *mci;
u32 caps;
int ret;
+ struct esdhc_platform_data *pdata = dev->platform_data;
host = xzalloc(sizeof(*host));
mci = &host->mci;
@@ -534,7 +535,10 @@ static int fsl_esdhc_probe(struct device_d *dev)
if (caps & ESDHC_HOSTCAPBLT_VS33)
mci->voltages |= MMC_VDD_32_33 | MMC_VDD_33_34;
- mci->host_caps = MMC_MODE_4BIT | MMC_MODE_8BIT;
+ if (pdata && pdata->caps)
+ mci->host_caps = pdata->caps;
+ else
+ mci->host_caps = MMC_MODE_4BIT;
if (caps & ESDHC_HOSTCAPBLT_HSS)
mci->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
--
1.7.9
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