Initial Tegra support has no initialisation routines, so it can't initialise the caches in the right way. MMU & cache code in arch/arm/cpu/start.c hangs up a Tegra-based system. Signed-off-by: Antony Pavlov <antonynpavlov@xxxxxxxxx> --- arch/arm/cpu/start.c | 3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) diff --git a/arch/arm/cpu/start.c b/arch/arm/cpu/start.c index f8eb0a9..69fb5b0 100644 --- a/arch/arm/cpu/start.c +++ b/arch/arm/cpu/start.c @@ -74,6 +74,8 @@ void __naked __bare_init reset(void) #ifdef CONFIG_ARCH_HAS_LOWLEVEL_INIT arch_init_lowlevel(); #endif + +#ifndef CONFIG_ARCH_TEGRA __asm__ __volatile__ ( "bl __mmu_cache_flush;" : @@ -89,6 +91,7 @@ void __naked __bare_init reset(void) r |= CR_B; #endif set_cr(r); +#endif #ifdef CONFIG_MACH_DO_LOWLEVEL_INIT board_init_lowlevel(); -- 1.7.7 _______________________________________________ barebox mailing list barebox@xxxxxxxxxxxxxxxxxxx http://lists.infradead.org/mailman/listinfo/barebox
