From: Juergen Beisert <juergen@xxxxxxxxxxxxxx>
The default configuration of the current 2.6.37 kernel uses a flash based BBT.
So, barebox must also use one, to be in sync with the kernel about bad blocks
in the flash.
Due to the used OOB layout, the generic BBT description coming with the
framework can be used.
Signed-off-by: Juergen Beisert <juergen@xxxxxxxxxxxxxx>
---
arch/arm/mach-s3c24xx/include/mach/s3c24x0-nand.h | 1 +
drivers/mtd/nand/nand_s3c2410.c | 6 ++++++
2 files changed, 7 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-s3c24xx/include/mach/s3c24x0-nand.h b/arch/arm/mach-s3c24xx/include/mach/s3c24x0-nand.h
index 05f9cf0..d06287e 100644
--- a/arch/arm/mach-s3c24xx/include/mach/s3c24x0-nand.h
+++ b/arch/arm/mach-s3c24xx/include/mach/s3c24x0-nand.h
@@ -45,6 +45,7 @@ extern void s3c24x0_nand_load_image(void*, int, int, int);
*/
struct s3c24x0_nand_platform_data {
uint32_t nand_timing; /**< value for the NFCONF register (timing bits only) */
+ char flash_bbt; /**< force a flash based BBT */
};
/**
diff --git a/drivers/mtd/nand/nand_s3c2410.c b/drivers/mtd/nand/nand_s3c2410.c
index fa4acf4..8a47dc6 100644
--- a/drivers/mtd/nand/nand_s3c2410.c
+++ b/drivers/mtd/nand/nand_s3c2410.c
@@ -349,6 +349,7 @@ static int s3c24x0_nand_inithw(struct s3c24x0_nand_host *host)
static int s3c24x0_nand_probe(struct device_d *dev)
{
struct nand_chip *chip;
+ struct s3c24x0_nand_platform_data *pdata = dev->platform_data;
struct mtd_info *mtd;
struct s3c24x0_nand_host *host;
int ret;
@@ -393,6 +394,11 @@ static int s3c24x0_nand_probe(struct device_d *dev)
chip->ecc.bytes = 3;
chip->ecc.layout = &nand_hw_eccoob;
+ if (pdata->flash_bbt) {
+ /* use a flash based bbt */
+ chip->options |= NAND_USE_FLASH_BBT;
+ }
+
ret = s3c24x0_nand_inithw(host);
if (ret != 0)
goto on_error;
--
1.7.2.3
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