Patch "drm/i915/dp: only use training pattern 3 on platforms that support it" has been added to the 3.17-stable tree

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This is a note to let you know that I've just added the patch titled

    drm/i915/dp: only use training pattern 3 on platforms that support it

to the 3.17-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     drm-i915-dp-only-use-training-pattern-3-on-platforms-that-support-it.patch
and it can be found in the queue-3.17 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.


>From 7809a61176b385ebb3299ea43c58b1bb31ffb8c0 Mon Sep 17 00:00:00 2001
From: Jani Nikula <jani.nikula@xxxxxxxxx>
Date: Wed, 29 Oct 2014 11:03:26 +0200
Subject: drm/i915/dp: only use training pattern 3 on platforms that support it
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

From: Jani Nikula <jani.nikula@xxxxxxxxx>

commit 7809a61176b385ebb3299ea43c58b1bb31ffb8c0 upstream.

Ivybridge + 30" monitor prints a drm error on every modeset, since IVB
doesn't support DP3 we should even bother trying to use it.

This regression has been introduced in

commit 06ea66b6bb445043dc25a9626254d5c130093199
Author: Todd Previte <tprevite@xxxxxxxxx>
Date:   Mon Jan 20 10:19:39 2014 -0700

    drm/i915: Enable 5.4Ghz (HBR2) link rate for Displayport 1.2-capable
devices

Reported-by: Dave Airlie <airlied@xxxxxxxxxx>
Reference: http://mid.gmane.org/1414566170-9868-1-git-send-email-airlied@xxxxxxxxx
Cc: Todd Previte <tprevite@xxxxxxxxx>
Reviewed-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
Signed-off-by: Jani Nikula <jani.nikula@xxxxxxxxx>
Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>

---
 drivers/gpu/drm/i915/intel_dp.c |    5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -3354,9 +3354,10 @@ intel_dp_get_dpcd(struct intel_dp *intel
 		}
 	}
 
-	/* Training Pattern 3 support */
+	/* Training Pattern 3 support, both source and sink */
 	if (intel_dp->dpcd[DP_DPCD_REV] >= 0x12 &&
-	    intel_dp->dpcd[DP_MAX_LANE_COUNT] & DP_TPS3_SUPPORTED) {
+	    intel_dp->dpcd[DP_MAX_LANE_COUNT] & DP_TPS3_SUPPORTED &&
+	    (IS_HASWELL(dev) || INTEL_INFO(dev)->gen >= 8)) {
 		intel_dp->use_tps3 = true;
 		DRM_DEBUG_KMS("Displayport TPS3 supported");
 	} else


Patches currently in stable-queue which might be from jani.nikula@xxxxxxxxx are

queue-3.17/drm-i915-disable-caches-for-global-gtt.patch
queue-3.17/drm-i915-safeguard-against-too-high-minimum-brightness.patch
queue-3.17/drm-i915-dp-only-use-training-pattern-3-on-platforms-that-support-it.patch
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