On Tue, Feb 21, 2023 at 11:29 AM Greg KH <gregkh@xxxxxxxxxxxxxxxxxxx> wrote: > > On Tue, Feb 21, 2023 at 07:49:07PM +0100, KP Singh wrote: > > Setting the IBRS bit implicitly enables STIBP to protect against > > cross-thread branch target injection. With enhanced IBRS, the bit it set > > once and is not cleared again. However, on CPUs with just legacy IBRS, > > IBRS bit set on user -> kernel and cleared on kernel -> user (a.k.a > > KERNEL_IBRS). Clearing this bit also disables the implicitly enabled > > STIBP, thus requiring some form of cross-thread protection in userspace. > > > > Enable STIBP, either opt-in via prctl or seccomp, or always on depending > > on the choice of mitigation selected via spectre_v2_user. > > > > Reported-by: José Oliveira <joseloliveira11@xxxxxxxxx> > > Reported-by: Rodrigo Branco <rodrigo@xxxxxxxxxxxxxxxxx> > > Reviewed-by: Alexandra Sandulescu <aesa@xxxxxxxxxx> > > Fixes: 7c693f54c873 ("x86/speculation: Add spectre_v2=ibrs option to support Kernel IBRS") > > Cc: stable@xxxxxxxxxxxxxxx > > Signed-off-by: KP Singh <kpsingh@xxxxxxxxxx> > > --- > > arch/x86/kernel/cpu/bugs.c | 33 ++++++++++++++++++++++----------- > > 1 file changed, 22 insertions(+), 11 deletions(-) > > Why isn't patch 2/2 for stable as well? It should be. I actually forgot to remove stable from the first one as there are still ongoing discussions and people kept having to "drop stable". I can send a v3 with stable Cc'ed. Should it have a fixes tag too? > > thanks, > > greg k-h