The patch below does not apply to the 6.1-stable tree.
If someone wants it applied there, or to any other stable or longterm
tree, then please email the backport, including the original git commit
id to <stable@xxxxxxxxxxxxxxx>.
Possible dependencies:
6217e9f05a74 ("drm/i915/dsi: fix MIPI_BKLT_EN_1 native GPIO index")
963bbdb32b47 ("drm/i915/dsi: add support for ICL+ native MIPI GPIO sequence")
8cee664d3eb6 ("drm/i915: use proper helper for register updates")
e58c2cac2c21 ("drm/i915/display: Use intel_uncore alias if defined")
thanks,
greg k-h
------------------ original commit in Linus's tree ------------------
>From 6217e9f05a74df48c77ee68993d587cdfdb1feb7 Mon Sep 17 00:00:00 2001
From: Jani Nikula <jani.nikula@xxxxxxxxx>
Date: Tue, 20 Dec 2022 16:01:05 +0200
Subject: [PATCH] drm/i915/dsi: fix MIPI_BKLT_EN_1 native GPIO index
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Due to copy-paste fail, MIPI_BKLT_EN_1 would always use PPS index 1,
never 0. Fix the sloppiest commit in recent memory.
Fixes: 963bbdb32b47 ("drm/i915/dsi: add support for ICL+ native MIPI GPIO sequence")
Reported-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
Signed-off-by: Jani Nikula <jani.nikula@xxxxxxxxx>
Reviewed-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
Link: https://patchwork.freedesktop.org/patch/msgid/20221220140105.313333-1-jani.nikula@xxxxxxxxx
(cherry picked from commit a561933c571798868b5fa42198427a7e6df56c09)
Cc: stable@xxxxxxxxxxxxxxx # 6.1
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx>
diff --git a/drivers/gpu/drm/i915/display/intel_dsi_vbt.c b/drivers/gpu/drm/i915/display/intel_dsi_vbt.c
index 41f025f089d9..2cbc1292ab38 100644
--- a/drivers/gpu/drm/i915/display/intel_dsi_vbt.c
+++ b/drivers/gpu/drm/i915/display/intel_dsi_vbt.c
@@ -430,7 +430,7 @@ static void icl_native_gpio_set_value(struct drm_i915_private *dev_priv,
break;
case MIPI_BKLT_EN_1:
case MIPI_BKLT_EN_2:
- index = gpio == MIPI_AVDD_EN_1 ? 0 : 1;
+ index = gpio == MIPI_BKLT_EN_1 ? 0 : 1;
intel_de_rmw(dev_priv, PP_CONTROL(index), EDP_BLC_ENABLE,
value ? EDP_BLC_ENABLE : 0);
