On Fri, 2022-08-19 at 10:47 +0200, Peter Zijlstra wrote: > On Fri, Aug 19, 2022 at 02:33:08AM +0200, Ben Hutchings wrote: > > From: Ben Hutchings <benh@xxxxxxxxxx> > > > > The mitigation for PBRSB includes adding LFENCE instructions to the > > RSB filling sequence. However, RSB filling is done on some older CPUs > > that don't support the LFENCE instruction. > > > > Wait; what? There are chips that enable the RSB mitigations and DONT > have LFENCE ?!? Yes, X86_FEATURE_RSB_CTXSW is enabled if any other Spectre v2 mitigation is enabled. And all Intel family 6 (except some early Atoms) and AMD family 5+ get Spectre v2 mitigation by default. Ben. -- Ben Hutchings Beware of bugs in the above code; I have only proved it correct, not tried it. - Donald Knuth
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