On Mon, Jul 11, 2022 at 05:44:29PM +0200, Fabien DESSENNE wrote:
> On 11/07/2022 09:08, gregkh@xxxxxxxxxxxxxxxxxxx wrote:
> >
> > The patch below does not apply to the 5.18-stable tree.
> > If someone wants it applied there, or to any other stable or longterm
> > tree, then please email the backport, including the original git commit
> > id to <stable@xxxxxxxxxxxxxxx>.
> >
> > thanks,
> >
> > greg k-h
> >
> > ------------------ original commit in Linus's tree ------------------
> >
> > From a1d4ef1adf8bbd302067534ead671a94759687ed Mon Sep 17 00:00:00 2001
> > From: Fabien Dessenne <fabien.dessenne@xxxxxxxxxxx>
> > Date: Mon, 27 Jun 2022 16:23:50 +0200
> > Subject: [PATCH] pinctrl: stm32: fix optional IRQ support to gpios
> >
> > To act as an interrupt controller, a gpio bank relies on the
> > "interrupt-parent" of the pin controller.
> > When this optional "interrupt-parent" misses, do not create any IRQ domain.
> >
> > This fixes a "NULL pointer in stm32_gpio_domain_alloc()" kernel crash when
> > the interrupt-parent = <exti> property is not declared in the Device Tree.
> >
> > Fixes: 0eb9f683336d ("pinctrl: Add IRQ support to STM32 gpios")
> > Signed-off-by: Fabien Dessenne <fabien.dessenne@xxxxxxxxxxx>
> > Link: https://lore.kernel.org/r/20220627142350.742973-1-fabien.dessenne@xxxxxxxxxxx
> > Signed-off-by: Linus Walleij <linus.walleij@xxxxxxxxxx>
> >
> > diff --git a/drivers/pinctrl/stm32/pinctrl-stm32.c b/drivers/pinctrl/stm32/pinctrl-stm32.c
> > index 57a33fb0f2d7..14bcca73238a 100644
> > --- a/drivers/pinctrl/stm32/pinctrl-stm32.c
> > +++ b/drivers/pinctrl/stm32/pinctrl-stm32.c
> > @@ -1338,16 +1338,18 @@ static int stm32_gpiolib_register_bank(struct stm32_pinctrl *pctl, struct fwnode
> > bank->secure_control = pctl->match_data->secure_control;
> > spin_lock_init(&bank->lock);
> > - /* create irq hierarchical domain */
> > - bank->fwnode = fwnode;
> > + if (pctl->domain) {
> > + /* create irq hierarchical domain */
> > + bank->fwnode = fwnode;
> > - bank->domain = irq_domain_create_hierarchy(pctl->domain, 0,
> > - STM32_GPIO_IRQ_LINE, bank->fwnode,
> > - &stm32_gpio_domain_ops, bank);
> > + bank->domain = irq_domain_create_hierarchy(pctl->domain, 0, STM32_GPIO_IRQ_LINE,
> > + bank->fwnode, &stm32_gpio_domain_ops,
> > + bank);
> > - if (!bank->domain) {
> > - err = -ENODEV;
> > - goto err_clk;
> > + if (!bank->domain) {
> > + err = -ENODEV;
> > + goto err_clk;
> > + }
> > }
> > err = gpiochip_add_data(&bank->gpio_chip, bank);
> > @@ -1510,6 +1512,8 @@ int stm32_pctl_probe(struct platform_device *pdev)
> > pctl->domain = stm32_pctrl_get_irq_domain(pdev);
> > if (IS_ERR(pctl->domain))
> > return PTR_ERR(pctl->domain);
> > + if (!pctl->domain)
> > + dev_warn(dev, "pinctrl without interrupt support\n");
> > /* hwspinlock is optional */
> > hwlock_id = of_hwspin_lock_get_id(pdev->dev.of_node, 0);
> >
>
> Hi,
>
> Below is an updated patch which fixes the problem on all 5.x releases (5.18,
> 5.15, 5.10, 5.4).
> The initial patch can be dropped on any 4.x releases.
Thanks, now queued up. Note, this was white-spaced damaged, I had to
fix it up by hand, you should fix your email client.
greg k-h
