From: Christoph Hellwig > Sent: 28 March 2022 07:37 > > On Fri, Mar 25, 2022 at 11:46:09AM -0700, Linus Torvalds wrote: > > I think my list of three different sync cases (not just two! It's not > > just about whether to sync for the CPU or the device, it's also about > > what direction the data itself is taking) is correct. > > > > But maybe I'm wrong. > > At the high level you are correct. It is all about which direction > the data is taking. That is the direction argument that all the > map/unmap/sync call take. The sync calls then just toggle the ownership. > You seem to hate that ownership concept, but I don't see how things > could work without that ownership concept as we're going to be in > trouble without having that. And yes, a peek operation could work in > some cases, but it would have to be at the cache line granularity. I don't think it is really 'ownership' but more about who has write access. Only one side can have write access (to a cache line [1]) at any one time. Read access is different. You need a 'synchronise' action to pick up newly written data. This might be a data copy, cache flush or cache invalidate. It only need affect the area that needs to be read - not full buffer. Partial cache flush/invalidate will almost certainly speed up receipt of short network packets that are copied into a new skb - leaving the old one mapped for another receive. [1] The cache line size might be a property of the device and dma subsystem, not just the cpu. I have used hardware when the effective size was 1kB. David - Registered Address Lakeside, Bramley Road, Mount Farm, Milton Keynes, MK1 1PT, UK Registration No: 1397386 (Wales)
