On Sun, May 16, 2021 at 11:22 AM Matthew Wilcox <willy@xxxxxxxxxxxxx> wrote:
>
> Nobody's been willing to guarantee that all 32-bit architectures keep the
> top 20 bits clear for their DMA addresses. I've certainly seen hardware
> (maybe PA-RISC? MIPS?) which uses the top few bits of the DMA address to
> indicate things like "coherent" or "bypasses IOMMU". Rather than trying
> to find out, I thought this was the safer option.
Fair enough. I just find it somewhat odd.
But I still find this a bit ugly. Maybe we could just have made that
one sub-structure "__aligned(4)", and avoided this all, and let the
compiler generate the split load (or, more likely, just let the
compiler generate a regular load from an unaligned location).
IOW, just
struct { /* page_pool used by netstack */
/**
* @dma_addr: might require a 64-bit value even on
* 32-bit architectures.
*/
dma_addr_t dma_addr;
} __aligned((4));
without the magic shifting games?
Linus
