On Fri, Feb 21, 2020 at 11:29:49AM +0100, Pavel Machek wrote: > Hi! > > > Hardcode the EPT page-walk level for L2 to be 4 levels, as KVM's MMU > > currently also hardcodes the page walk level for nested EPT to be 4 > > levels. The L2 guest is all but guaranteed to soft hang on its first > > instruction when L1 is using EPT, as KVM will construct 4-level page > > tables and then tell hardware to use 5-level page tables. > > I don't get it. 7/191 reverts the patch, then 9/191 reverts the > revert. Can we simply drop both 7 and 9, for exactly the same result? > > (Patch 8 is a unused file, so it does not change the picture). Patch 07 is reverting this patch from the same unused file, arch/x86/kvm/vmx/vmx.c[*]. The reason patch 07 looks like a normal diff is that a prior patch in 4.19.105 created the unused file (which is what's reverted by patch 08 here). Patch 09 reintroduces the fix for the correct file, arch/x86/kvm/vmx.c. [*] In upstream, vmx.c now lives in arch/x86/kvm/vmx/, but in 4.19 and earlier it lives in arch/x86/kvm/. > > Best regards, > Pavel > > > +++ b/arch/x86/kvm/vmx.c > > @@ -5302,6 +5302,9 @@ static void vmx_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0) > > > > static int get_ept_level(struct kvm_vcpu *vcpu) > > { > > + /* Nested EPT currently only supports 4-level walks. */ > > + if (is_guest_mode(vcpu) && nested_cpu_has_ept(get_vmcs12(vcpu))) > > + return 4; > > if (cpu_has_vmx_ept_5levels() && (cpuid_maxphyaddr(vcpu) > 48)) > > return 5; > > return 4; > > -- > > 2.20.1 > > > > > > -- > (english) http://www.livejournal.com/~pavelmachek > (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html