Re: [PATCH] drm/i915: Limit MST to <= 8bpc once again

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Reviewed-by: Lyude Paul <lyude@xxxxxxxxxx>

On Wed, 2019-08-28 at 13:20 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> 
> My attempt at allowing MST to use the higher color depths has
> regressed some configurations. Apparently people have setups
> where all MST streams will fit into the DP link with 8bpc but
> won't fit with higher color depths.
> 
> What we really should be doing is reducing the bpc for all the
> streams on the same link until they start to fit. But that requires
> a bit more work, so in the meantime let's revert back closer to
> the old behavior and limit MST to at most 8bpc.
> 
> Cc: stable@xxxxxxxxxxxxxxx
> Cc: Lyude Paul <lyude@xxxxxxxxxx>
> Cc: Geoffrey Bennett <gmux22@xxxxxxxxx>
> Fixes: f1477219869c ("drm/i915: Remove the 8bpc shackles from DP MST")
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111505
> Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> ---
>  drivers/gpu/drm/i915/display/intel_dp_mst.c | 10 +++++++++-
>  1 file changed, 9 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index 2c5ac3dd647f..6df240a01b8c 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -128,7 +128,15 @@ static int intel_dp_mst_compute_config(struct
> intel_encoder *encoder,
>  	limits.max_lane_count = intel_dp_max_lane_count(intel_dp);
>  
>  	limits.min_bpp = intel_dp_min_bpp(pipe_config);
> -	limits.max_bpp = pipe_config->pipe_bpp;
> +	/*
> +	 * FIXME: If all the streams can't fit into the link with
> +	 * their current pipe_bpp we should reduce pipe_bpp across
> +	 * the board until things start to fit. Until then we
> +	 * limit to <= 8bpc since that's what was hardcoded for all
> +	 * MST streams previously. This hack should be removed once
> +	 * we have the proper retry logic in place.
> +	 */
> +	limits.max_bpp = min(pipe_config->pipe_bpp, 24);
>  
>  	intel_dp_adjust_compliance_config(intel_dp, pipe_config, &limits);
>  
-- 
Cheers,
	Lyude Paul




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