On 03/19/2019 07:18 PM, Sverdlin, Alexander (Nokia - DE/Ulm) wrote: > From: Alexander Sverdlin <alexander.sverdlin@xxxxxxxxx> > > It was observed that reads crossing 4K address boundary are failing. > > This limitation is mentioned in Intel documents: > > Intel(R) 9 Series Chipset Family Platform Controller Hub (PCH) Datasheet: > > "5.26.3 Flash Access > Program Register Access: > * Program Register Accesses are not allowed to cross a 4 KB boundary..." > > Enhanced Serial Peripheral Interface (eSPI) > Interface Base Specification (for Client and Server Platforms): > > "5.1.4 Address > For other memory transactions, the address may start or end at any byte > boundary. However, the address and payload length combination must not > cross the naturally aligned address boundary of the corresponding Maximum > Payload Size. It must not cross a 4 KB address boundary." > > Avoid this by splitting an operation crossing the boundary into two > operations. > > Cc: stable@xxxxxxxxxxxxxxx > Reported-by: Romain Porte <romain.porte@xxxxxxxxx> > Tested-by: Pascal Fabreges <pascal.fabreges@xxxxxxxxx> > Signed-off-by: Alexander Sverdlin <alexander.sverdlin@xxxxxxxxx> > --- > Changelog: > v2: More macros! As suggested by Mika. > v3: Actually compiled. Sorry Mika, the lines are really long now. > v4: Add "mtd:" to the subject > > drivers/mtd/spi-nor/intel-spi.c | 8 ++++++++ > 1 file changed, 8 insertions(+) Applied to http://git.infradead.org/linux-mtd.git, spi-nor/next. Thanks.
