Re: [PATCH] clk: sunxi-ng: a31: Correct lcd1-ch1 clock register offset

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On Wed, May 03, 2017 at 11:13:46AM +0800, Chen-Yu Tsai wrote:
> The register offset for the lcd1-ch1 clock was incorrectly pointing to
> the lcd0-ch1 clock. This resulted in the lcd0-ch1 clock being disabled
> when the clk core disables unused clocks. This then stops the simplefb
> HDMI output path.
> 
> Reported-by: Bob Ham <rah@xxxxxxxxxxxx>
> Fixes: c6e6c96d8fa6 ("clk: sunxi-ng: Add A31/A31s clocks")
> Cc: stable@xxxxxxxxxxxxxxx # 4.9.x-
> Signed-off-by: Chen-Yu Tsai <wens@xxxxxxxx>

Applied, thanks!
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

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