This is a note to let you know that I've just added the patch titled
arm64: dts: rockchip: fix defines in pd_vio node for rk3399
to the 5.4-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
arm64-dts-rockchip-fix-defines-in-pd_vio-node-for-rk.patch
and it can be found in the queue-5.4 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.
commit 2206567d1784e6cf02db62c8a07215298215f39b
Author: Johan Jonker <jbx6244@xxxxxxxxx>
Date: Tue Apr 28 22:30:02 2020 +0200
arm64: dts: rockchip: fix defines in pd_vio node for rk3399
[ Upstream commit 84836ded76ec9a6f25d1d0acebaad44977e0ec6f ]
A test with the command below gives for example this error:
arch/arm64/boot/dts/rockchip/rk3399-evb.dt.yaml: pd_vio@15:
'pd_tcpc0@RK3399_PD_TCPC0', 'pd_tcpc1@RK3399_PD_TCPC1'
do not match any of the regexes:
'.*-names$', '.*-supply$', '^#.*-cells$',
'^#[a-zA-Z0-9,+\\-._]{0,63}$',
'^[a-zA-Z][a-zA-Z0-9,+\\-._]{0,63}$',
'^[a-zA-Z][a-zA-Z0-9,+\\-._]{0,63}@[0-9a-fA-F]+(,[0-9a-fA-F]+)*$',
'^__.*__$', 'pinctrl-[0-9]+'
Fix error by replacing the wrong defines by the ones
mentioned in 'rk3399-power.h'.
make -k ARCH=arm64 dtbs_check
Signed-off-by: Johan Jonker <jbx6244@xxxxxxxxx>
Link: https://lore.kernel.org/r/20200428203003.3318-1-jbx6244@xxxxxxxxx
Signed-off-by: Heiko Stuebner <heiko@xxxxxxxxx>
Stable-dep-of: 3699f2c43ea9 ("arm64: dts: rockchip: add hevc power domain clock to rk3328")
Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index e5a25bc7d799..dcd989563d27 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1089,12 +1089,12 @@ pd_isp1@RK3399_PD_ISP1 {
pm_qos = <&qos_isp1_m0>,
<&qos_isp1_m1>;
};
- pd_tcpc0@RK3399_PD_TCPC0 {
+ pd_tcpc0@RK3399_PD_TCPD0 {
reg = <RK3399_PD_TCPD0>;
clocks = <&cru SCLK_UPHY0_TCPDCORE>,
<&cru SCLK_UPHY0_TCPDPHY_REF>;
};
- pd_tcpc1@RK3399_PD_TCPC1 {
+ pd_tcpc1@RK3399_PD_TCPD1 {
reg = <RK3399_PD_TCPD1>;
clocks = <&cru SCLK_UPHY1_TCPDCORE>,
<&cru SCLK_UPHY1_TCPDPHY_REF>;
