Patch "perf: riscv: Fix selecting counters in legacy mode" has been added to the 6.10-stable tree

[Sasha Levin <sashal@xxxxxxxxxx>]

This is a note to let you know that I've just added the patch titled

    perf: riscv: Fix selecting counters in legacy mode

to the 6.10-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     perf-riscv-fix-selecting-counters-in-legacy-mode.patch
and it can be found in the queue-6.10 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit 72e58a06e9c824aafd73b0746288c8ee5322c1e9
Author: Shifrin Dmitry <dmitry.shifrin@xxxxxxxxxxxxx>
Date:   Mon Jul 29 15:58:58 2024 +0300

    perf: riscv: Fix selecting counters in legacy mode
    
    [ Upstream commit 941a8e9b7a86763ac52d5bf6ccc9986d37fde628 ]
    
    It is required to check event type before checking event config.
    Events with the different types can have the same config.
    This check is missed for legacy mode code
    
    For such perf usage:
        sysctl -w kernel.perf_user_access=2
        perf stat -e cycles,L1-dcache-loads --
    driver will try to force both events to CYCLE counter.
    
    This commit implements event type check before forcing
    events on the special counters.
    
    Signed-off-by: Shifrin Dmitry <dmitry.shifrin@xxxxxxxxxxxxx>
    Reviewed-by: Atish Patra <atishp@xxxxxxxxxxxx>
    Fixes: cc4c07c89aad ("drivers: perf: Implement perf event mmap support in the SBI backend")
    Link: https://lore.kernel.org/r/20240729125858.630653-1-dmitry.shifrin@xxxxxxxxxxxxx
    Signed-off-by: Palmer Dabbelt <palmer@xxxxxxxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/drivers/perf/riscv_pmu_sbi.c b/drivers/perf/riscv_pmu_sbi.c
index 4e842dcedfbaa..11c7c85047ed4 100644
--- a/drivers/perf/riscv_pmu_sbi.c
+++ b/drivers/perf/riscv_pmu_sbi.c
@@ -412,7 +412,7 @@ static int pmu_sbi_ctr_get_idx(struct perf_event *event)
 	 * but not in the user access mode as we want to use the other counters
 	 * that support sampling/filtering.
 	 */
-	if (hwc->flags & PERF_EVENT_FLAG_LEGACY) {
+	if ((hwc->flags & PERF_EVENT_FLAG_LEGACY) && (event->attr.type == PERF_TYPE_HARDWARE)) {
 		if (event->attr.config == PERF_COUNT_HW_CPU_CYCLES) {
 			cflags |= SBI_PMU_CFG_FLAG_SKIP_MATCH;
 			cmask = 1;