Patch "riscv/purgatory: align riscv_kernel_entry" has been added to the 6.10-stable tree

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This is a note to let you know that I've just added the patch titled

    riscv/purgatory: align riscv_kernel_entry

to the 6.10-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     riscv-purgatory-align-riscv_kernel_entry.patch
and it can be found in the queue-6.10 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit 388756fbbcf99ba0ceffe1144cd238caa50c4a3a
Author: Daniel Maslowski <cyrevolt@xxxxxxxxxxxxxx>
Date:   Fri Jul 19 19:04:37 2024 +0200

    riscv/purgatory: align riscv_kernel_entry
    
    [ Upstream commit fb197c5d2fd24b9af3d4697d0cf778645846d6d5 ]
    
    When alignment handling is delegated to the kernel, everything must be
    word-aligned in purgatory, since the trap handler is then set to the
    kexec one. Without the alignment, hitting the exception would
    ultimately crash. On other occasions, the kernel's handler would take
    care of exceptions.
    This has been tested on a JH7110 SoC with oreboot and its SBI delegating
    unaligned access exceptions and the kernel configured to handle them.
    
    Fixes: 736e30af583fb ("RISC-V: Add purgatory")
    Signed-off-by: Daniel Maslowski <cyrevolt@xxxxxxxxx>
    Reviewed-by: Alexandre Ghiti <alexghiti@xxxxxxxxxxxx>
    Link: https://lore.kernel.org/r/20240719170437.247457-1-cyrevolt@xxxxxxxxx
    Signed-off-by: Palmer Dabbelt <palmer@xxxxxxxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/arch/riscv/purgatory/entry.S b/arch/riscv/purgatory/entry.S
index 5bcf3af903daa..0e6ca6d5ae4b4 100644
--- a/arch/riscv/purgatory/entry.S
+++ b/arch/riscv/purgatory/entry.S
@@ -7,6 +7,7 @@
  * Author: Li Zhengyu (lizhengyu3@xxxxxxxxxx)
  *
  */
+#include <asm/asm.h>
 #include <linux/linkage.h>
 
 .text
@@ -34,6 +35,7 @@ SYM_CODE_END(purgatory_start)
 
 .data
 
+.align LGREG
 SYM_DATA(riscv_kernel_entry, .quad 0)
 
 .end




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