Patch "irqchip/renesas-rzg2l: Implement restriction when writing ISCR register" has been added to the 6.6-stable tree

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This is a note to let you know that I've just added the patch titled

    irqchip/renesas-rzg2l: Implement restriction when writing ISCR register

to the 6.6-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     irqchip-renesas-rzg2l-implement-restriction-when-wri.patch
and it can be found in the queue-6.6 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit 9a61fa85addafd27eca46b19c49f1f84700018cc
Author: Claudiu Beznea <claudiu.beznea.uj@xxxxxxxxxxxxxx>
Date:   Mon Nov 20 13:18:16 2023 +0200

    irqchip/renesas-rzg2l: Implement restriction when writing ISCR register
    
    [ Upstream commit ef88eefb1a81a8701eabb7d5ced761a66a465a49 ]
    
    The RZ/G2L manual (chapter "IRQ Status Control Register (ISCR)") describes
    the operation to clear interrupts through the ISCR register as follows:
    
    [Write operation]
    
      When "Falling-edge detection", "Rising-edge detection" or
      "Falling/Rising-edge detection" is set in IITSR:
    
        - In case ISTAT is 1
            0: IRQn interrupt detection status is cleared.
            1: Invalid to write.
        - In case ISTAT is 0
            Invalid to write.
    
      When "Low-level detection" is set in IITSR.:
            Invalid to write.
    
    Take the interrupt type into account when clearing interrupts through the
    ISCR register to avoid writing the ISCR when the interrupt type is level.
    
    Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@xxxxxxxxxxxxxx>
    Signed-off-by: Thomas Gleixner <tglx@xxxxxxxxxxxxx>
    Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
    Link: https://lore.kernel.org/r/20231120111820.87398-6-claudiu.beznea.uj@xxxxxxxxxxxxxx
    Stable-dep-of: 9eec61df55c5 ("irqchip/renesas-rzg2l: Flush posted write in irq_eoi()")
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/drivers/irqchip/irq-renesas-rzg2l.c b/drivers/irqchip/irq-renesas-rzg2l.c
index 96f4e322ed6b7..8e0b15c7fe7f1 100644
--- a/drivers/irqchip/irq-renesas-rzg2l.c
+++ b/drivers/irqchip/irq-renesas-rzg2l.c
@@ -72,11 +72,17 @@ static void rzg2l_irq_eoi(struct irq_data *d)
 	unsigned int hw_irq = irqd_to_hwirq(d) - IRQC_IRQ_START;
 	struct rzg2l_irqc_priv *priv = irq_data_to_priv(d);
 	u32 bit = BIT(hw_irq);
-	u32 reg;
+	u32 iitsr, iscr;
 
-	reg = readl_relaxed(priv->base + ISCR);
-	if (reg & bit)
-		writel_relaxed(reg & ~bit, priv->base + ISCR);
+	iscr = readl_relaxed(priv->base + ISCR);
+	iitsr = readl_relaxed(priv->base + IITSR);
+
+	/*
+	 * ISCR can only be cleared if the type is falling-edge, rising-edge or
+	 * falling/rising-edge.
+	 */
+	if ((iscr & bit) && (iitsr & IITSR_IITSEL_MASK(hw_irq)))
+		writel_relaxed(iscr & ~bit, priv->base + ISCR);
 }
 
 static void rzg2l_tint_eoi(struct irq_data *d)




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