Patch "clk: qcom: dispcc-sm8550: Update disp PLL settings" has been added to the 6.7-stable tree

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This is a note to let you know that I've just added the patch titled

    clk: qcom: dispcc-sm8550: Update disp PLL settings

to the 6.7-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     clk-qcom-dispcc-sm8550-update-disp-pll-settings.patch
and it can be found in the queue-6.7 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit ba126b9d9b6c0e1b578a3b264417082788e7e6bb
Author: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx>
Date:   Mon Dec 18 17:02:09 2023 +0100

    clk: qcom: dispcc-sm8550: Update disp PLL settings
    
    [ Upstream commit febd251d8775c4fb6e4acd6b5d7b0ed707f4611f ]
    
    The settings in the driver seem to have been taken from an older
    release. Update them to match the latest values.
    
    Fixes: 90114ca11476 ("clk: qcom: add SM8550 DISPCC driver")
    Signed-off-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx>
    Link: https://lore.kernel.org/r/20231218-topic-8550_fixes-v1-8-ce1272d77540@xxxxxxxxxx
    Signed-off-by: Bjorn Andersson <andersson@xxxxxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/drivers/clk/qcom/dispcc-sm8550.c b/drivers/clk/qcom/dispcc-sm8550.c
index aefa19f3c2c5..0b8f0904b339 100644
--- a/drivers/clk/qcom/dispcc-sm8550.c
+++ b/drivers/clk/qcom/dispcc-sm8550.c
@@ -81,6 +81,10 @@ static const struct alpha_pll_config disp_cc_pll0_config = {
 	.config_ctl_val = 0x20485699,
 	.config_ctl_hi_val = 0x00182261,
 	.config_ctl_hi1_val = 0x82aa299c,
+	.test_ctl_val = 0x00000000,
+	.test_ctl_hi_val = 0x00000003,
+	.test_ctl_hi1_val = 0x00009000,
+	.test_ctl_hi2_val = 0x00000034,
 	.user_ctl_val = 0x00000000,
 	.user_ctl_hi_val = 0x00000005,
 };
@@ -108,6 +112,10 @@ static const struct alpha_pll_config disp_cc_pll1_config = {
 	.config_ctl_val = 0x20485699,
 	.config_ctl_hi_val = 0x00182261,
 	.config_ctl_hi1_val = 0x82aa299c,
+	.test_ctl_val = 0x00000000,
+	.test_ctl_hi_val = 0x00000003,
+	.test_ctl_hi1_val = 0x00009000,
+	.test_ctl_hi2_val = 0x00000034,
 	.user_ctl_val = 0x00000000,
 	.user_ctl_hi_val = 0x00000005,
 };




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