Patch "soc: qcom: llcc: Fix dis_cap_alloc and retain_on_pc configuration" has been added to the 6.7-stable tree

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This is a note to let you know that I've just added the patch titled

    soc: qcom: llcc: Fix dis_cap_alloc and retain_on_pc configuration

to the 6.7-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     soc-qcom-llcc-fix-dis_cap_alloc-and-retain_on_pc-con.patch
and it can be found in the queue-6.7 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit e7bd958272f9dca48b4a9f255ac8584374c856e3
Author: Atul Dhudase <quic_adhudase@xxxxxxxxxxx>
Date:   Wed Dec 6 21:02:51 2023 +0530

    soc: qcom: llcc: Fix dis_cap_alloc and retain_on_pc configuration
    
    [ Upstream commit eed6e57e9f3e2beac37563eb6a0129549daa330e ]
    
    Commit c14e64b46944 ("soc: qcom: llcc: Support chipsets that can
     write to llcc") add the support for chipset where capacity based
    allocation and retention through power collapse can be programmed
    based on content of SCT table mentioned in the llcc driver where
    the target like sdm845 where the entire programming related to it
    is controlled in firmware. However, the commit introduces a bug
    where capacity/retention register get overwritten each time it
    gets programmed for each slice and that results in misconfiguration
    of the register based on SCT table and that is not expected
    behaviour instead it should be read modify write to retain the
    configuration of other slices.
    
    This issue is totally caught from code review and programming test
    and not through any power/perf numbers so, it is not known what
    impact this could make if we don't have this change however,
    this feature are for these targets and they should have been
    programmed accordingly as per their configuration mentioned in
    SCT table like others bits information.
    
    This change brings one difference where it keeps capacity/retention
    bits of the slices that are not mentioned in SCT table in unknown
    state where as earlier it was initialized to zero.
    
    Fixes: c14e64b46944 ("soc: qcom: llcc: Support chipsets that can write to llcc")
    Signed-off-by: Atul Dhudase <quic_adhudase@xxxxxxxxxxx>
    Signed-off-by: Mukesh Ojha <quic_mojha@xxxxxxxxxxx>
    Reviewed-by: Douglas Anderson <dianders@xxxxxxxxxxxx>
    Link: https://lore.kernel.org/r/1701876771-10695-1-git-send-email-quic_mojha@xxxxxxxxxxx
    Signed-off-by: Bjorn Andersson <andersson@xxxxxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/drivers/soc/qcom/llcc-qcom.c b/drivers/soc/qcom/llcc-qcom.c
index 674abd0d6700..2e32a0e521d5 100644
--- a/drivers/soc/qcom/llcc-qcom.c
+++ b/drivers/soc/qcom/llcc-qcom.c
@@ -941,15 +941,15 @@ static int _qcom_llcc_cfg_program(const struct llcc_slice_config *config,
 		u32 disable_cap_alloc, retain_pc;
 
 		disable_cap_alloc = config->dis_cap_alloc << config->slice_id;
-		ret = regmap_write(drv_data->bcast_regmap,
-				LLCC_TRP_SCID_DIS_CAP_ALLOC, disable_cap_alloc);
+		ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_SCID_DIS_CAP_ALLOC,
+					 BIT(config->slice_id), disable_cap_alloc);
 		if (ret)
 			return ret;
 
 		if (drv_data->version < LLCC_VERSION_4_1_0_0) {
 			retain_pc = config->retain_on_pc << config->slice_id;
-			ret = regmap_write(drv_data->bcast_regmap,
-					LLCC_TRP_PCB_ACT, retain_pc);
+			ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_PCB_ACT,
+						 BIT(config->slice_id), retain_pc);
 			if (ret)
 				return ret;
 		}




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