Patch "ARM: dts: imx6q: skov: fix ethernet clock regression" has been added to the 6.6-stable tree

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This is a note to let you know that I've just added the patch titled

    ARM: dts: imx6q: skov: fix ethernet clock regression

to the 6.6-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     arm-dts-imx6q-skov-fix-ethernet-clock-regression.patch
and it can be found in the queue-6.6 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit 9ca67d48432b1a65beb4324af0f2c2cb76d6ae5f
Author: Stefan Kerkmann <s.kerkmann@xxxxxxxxxxxxxx>
Date:   Wed Nov 1 12:03:37 2023 +0100

    ARM: dts: imx6q: skov: fix ethernet clock regression
    
    [ Upstream commit 6552218f4dc47ba3c6c5b58cc1e9eb208a2b438b ]
    
    A regression was introduced in the Skov specific i.MX6 flavor
    reve-mi1010ait-1cp1 device tree causing the external ethernet controller
    to not being selected as the clock source for the i.MX6 ethernet MAC,
    resulting in a none functional ethernet interface. The root cause is
    that the ethernet clock selection is now part of the clocks node, which
    is overwritten in the specific device tree and wasn't updated to contain
    these ethernet clocks.
    
    Fixes: c89614079e44 ("ARM: dts: imx6qdl-skov-cpu: configure ethernet reference clock parent")
    Signed-off-by: Stefan Kerkmann <s.kerkmann@xxxxxxxxxxxxxx>
    Signed-off-by: Shawn Guo <shawnguo@xxxxxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-skov-reve-mi1010ait-1cp1.dts b/arch/arm/boot/dts/nxp/imx/imx6q-skov-reve-mi1010ait-1cp1.dts
index a3f247c722b43..0342a79ccd5db 100644
--- a/arch/arm/boot/dts/nxp/imx/imx6q-skov-reve-mi1010ait-1cp1.dts
+++ b/arch/arm/boot/dts/nxp/imx/imx6q-skov-reve-mi1010ait-1cp1.dts
@@ -37,9 +37,9 @@ panel_in: endpoint {
 
 &clks {
 	assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
-			  <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
+			  <&clks IMX6QDL_CLK_LDB_DI1_SEL>, <&clks IMX6QDL_CLK_ENET_REF_SEL>;
 	assigned-clock-parents = <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>,
-				 <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>;
+				 <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>, <&clk50m_phy>;
 };
 
 &hdmi {




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