Patch "KVM: x86/pmu: Disallow legacy LBRs if architectural LBRs are available" has been added to the 6.1-stable tree

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This is a note to let you know that I've just added the patch titled

    KVM: x86/pmu: Disallow legacy LBRs if architectural LBRs are available

to the 6.1-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     kvm-x86-pmu-disallow-legacy-lbrs-if-architectural-lb.patch
and it can be found in the queue-6.1 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit fbed41939b41f759cbea3f2042a01afca42d6fe9
Author: Sean Christopherson <seanjc@xxxxxxxxxx>
Date:   Sat Jan 28 00:14:27 2023 +0000

    KVM: x86/pmu: Disallow legacy LBRs if architectural LBRs are available
    
    [ Upstream commit 098f4c061ea10b777033b71c10bd9fd706820ee9 ]
    
    Disallow enabling LBR support if the CPU supports architectural LBRs.
    Traditional LBR support is absent on CPU models that have architectural
    LBRs, and KVM doesn't yet support arch LBRs, i.e. KVM will pass through
    non-existent MSRs if userspace enables LBRs for the guest.
    
    Cc: stable@xxxxxxxxxxxxxxx
    Cc: Yang Weijiang <weijiang.yang@xxxxxxxxx>
    Cc: Like Xu <like.xu.linux@xxxxxxxxx>
    Reported-by: Paolo Bonzini <pbonzini@xxxxxxxxxx>
    Fixes: be635e34c284 ("KVM: vmx/pmu: Expose LBR_FMT in the MSR_IA32_PERF_CAPABILITIES")
    Tested-by: Like Xu <likexu@xxxxxxxxxxx>
    Link: https://lore.kernel.org/r/20230128001427.2548858-1-seanjc@xxxxxxxxxx
    Signed-off-by: Sean Christopherson <seanjc@xxxxxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
index 8ad5992f61340..5db21d9ef6710 100644
--- a/arch/x86/kvm/vmx/vmx.c
+++ b/arch/x86/kvm/vmx/vmx.c
@@ -7714,9 +7714,11 @@ static u64 vmx_get_perf_capabilities(void)
 	if (boot_cpu_has(X86_FEATURE_PDCM))
 		rdmsrl(MSR_IA32_PERF_CAPABILITIES, host_perf_cap);
 
-	x86_perf_get_lbr(&lbr);
-	if (lbr.nr)
-		perf_cap |= host_perf_cap & PMU_CAP_LBR_FMT;
+	if (!cpu_feature_enabled(X86_FEATURE_ARCH_LBR)) {
+		x86_perf_get_lbr(&lbr);
+		if (lbr.nr)
+			perf_cap |= host_perf_cap & PMU_CAP_LBR_FMT;
+	}
 
 	if (vmx_pebs_supported()) {
 		perf_cap |= host_perf_cap & PERF_CAP_PEBS_MASK;



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