Patch "clk: imx: imx8mp: add shared clk gate for usb suspend clk" has been added to the 5.15-stable tree

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This is a note to let you know that I've just added the patch titled

    clk: imx: imx8mp: add shared clk gate for usb suspend clk

to the 5.15-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     clk-imx-imx8mp-add-shared-clk-gate-for-usb-suspend-c.patch
and it can be found in the queue-5.15 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit ee2843f54c90aef164be3b1fc3534b20912dd1fb
Author: Li Jun <jun.li@xxxxxxx>
Date:   Fri Sep 30 22:54:22 2022 +0800

    clk: imx: imx8mp: add shared clk gate for usb suspend clk
    
    [ Upstream commit ed1f4ccfe947a3e1018a3bd7325134574c7ff9b3 ]
    
    32K usb suspend clock gate is shared with usb_root_clk, this
    shared clock gate was initially defined only for usb suspend
    clock, usb suspend clk is kept on while system is active or
    system sleep with usb wakeup enabled, so usb root clock is
    fine with this situation; with the commit cf7f3f4fa9e5
    ("clk: imx8mp: fix usb_root_clk parent"), this clock gate is
    changed to be for usb root clock, but usb root clock will
    be off while usb is suspended, so usb suspend clock will be
    gated too, this cause some usb functionalities will not work,
    so define this clock to be a shared clock gate to conform with
    the real HW status.
    
    Fixes: 9c140d9926761 ("clk: imx: Add support for i.MX8MP clock driver")
    Cc: stable@xxxxxxxxxxxxxxx # v5.19+
    Tested-by: Alexander Stein <alexander.stein@xxxxxxxxxxxxxxx>
    Signed-off-by: Li Jun <jun.li@xxxxxxx>
    Signed-off-by: Abel Vesa <abel.vesa@xxxxxxxxxx>
    Link: https://lore.kernel.org/r/1664549663-20364-2-git-send-email-jun.li@xxxxxxx
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c
index b173c30093946..ffcdd7393aefe 100644
--- a/drivers/clk/imx/clk-imx8mp.c
+++ b/drivers/clk/imx/clk-imx8mp.c
@@ -17,6 +17,7 @@
 
 static u32 share_count_nand;
 static u32 share_count_media;
+static u32 share_count_usb;
 
 static const char * const pll_ref_sels[] = { "osc_24m", "dummy", "dummy", "dummy", };
 static const char * const audio_pll1_bypass_sels[] = {"audio_pll1", "audio_pll1_ref_sel", };
@@ -675,7 +676,8 @@ static int imx8mp_clocks_probe(struct platform_device *pdev)
 	hws[IMX8MP_CLK_UART2_ROOT] = imx_clk_hw_gate4("uart2_root_clk", "uart2", ccm_base + 0x44a0, 0);
 	hws[IMX8MP_CLK_UART3_ROOT] = imx_clk_hw_gate4("uart3_root_clk", "uart3", ccm_base + 0x44b0, 0);
 	hws[IMX8MP_CLK_UART4_ROOT] = imx_clk_hw_gate4("uart4_root_clk", "uart4", ccm_base + 0x44c0, 0);
-	hws[IMX8MP_CLK_USB_ROOT] = imx_clk_hw_gate4("usb_root_clk", "hsio_axi", ccm_base + 0x44d0, 0);
+	hws[IMX8MP_CLK_USB_ROOT] = imx_clk_hw_gate2_shared2("usb_root_clk", "hsio_axi", ccm_base + 0x44d0, 0, &share_count_usb);
+	hws[IMX8MP_CLK_USB_SUSP] = imx_clk_hw_gate2_shared2("usb_suspend_clk", "osc_32k", ccm_base + 0x44d0, 0, &share_count_usb);
 	hws[IMX8MP_CLK_USB_PHY_ROOT] = imx_clk_hw_gate4("usb_phy_root_clk", "usb_phy_ref", ccm_base + 0x44f0, 0);
 	hws[IMX8MP_CLK_USDHC1_ROOT] = imx_clk_hw_gate4("usdhc1_root_clk", "usdhc1", ccm_base + 0x4510, 0);
 	hws[IMX8MP_CLK_USDHC2_ROOT] = imx_clk_hw_gate4("usdhc2_root_clk", "usdhc2", ccm_base + 0x4520, 0);



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