This is a note to let you know that I've just added the patch titled
arm64: dts: qcom: sdm845: narrow LLCC address space
to the 5.15-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
arm64-dts-qcom-sdm845-narrow-llcc-address-space.patch
and it can be found in the queue-5.15 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.
commit b06496f6e669d25307e4015cecd8b2d40cf47341
Author: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx>
Date: Thu Jul 28 13:37:47 2022 +0200
arm64: dts: qcom: sdm845: narrow LLCC address space
[ Upstream commit 300b5f661eebefb8571841b78091343eb87eca54 ]
The Last Level Cache Controller (LLCC) device does not need to access
entire LLCC address space. Currently driver uses only hardware info and
status registers which both reside in LLCC0_COMMON range (offset
0x30000, size 0x1000). Narrow the address space to allow binding other
drivers to rest of LLCC address space.
Cc: Rajendra Nayak <quic_rjendra@xxxxxxxxxxx>
Cc: Sibi Sankar <quic_sibis@xxxxxxxxxxx>
Reported-by: Steev Klimaszewski <steev@xxxxxxxx>
Suggested-by: Sibi Sankar <quic_sibis@xxxxxxxxxxx>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx>
Tested-by: Steev Klimaszewski <steev@xxxxxxxx>
Signed-off-by: Bjorn Andersson <bjorn.andersson@xxxxxxxxxx>
Link: https://lore.kernel.org/r/20220728113748.170548-11-krzysztof.kozlowski@xxxxxxxxxx
Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index ea7a272d267a..ce523ec8dd28 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -1968,7 +1968,7 @@
system-cache-controller@1100000 {
compatible = "qcom,sdm845-llcc";
- reg = <0 0x01100000 0 0x200000>, <0 0x01300000 0 0x50000>;
+ reg = <0 0x01100000 0 0x31000>, <0 0x01300000 0 0x50000>;
reg-names = "llcc_base", "llcc_broadcast_base";
interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>;
};
