From: James Morse <james.morse@xxxxxxx> __sdei_asm_trampoline_next_handler shouldn't have its own name as the tramp_data_read_var takes the symbol name, and generates the name for the value in the data page if CONFIG_RANDOMIZE_BASE is clear. This means when CONFIG_RANDOMIZE_BASE is clear, this code won't compile as __sdei_asm_trampoline_next_handler doesn't exist. Use the proper name, and let the macro do its thing. Reported-by: Florian Fainelli <f.fainelli@xxxxxxxxx> Tested-by: Florian Fainelli <f.fainelli@xxxxxxxxx> Signed-off-by: James Morse <james.morse@xxxxxxx> Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx> --- arch/arm64/kernel/entry.S | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) --- a/arch/arm64/kernel/entry.S +++ b/arch/arm64/kernel/entry.S @@ -1199,7 +1199,7 @@ __entry_tramp_data_start: __entry_tramp_data_vectors: .quad vectors #ifdef CONFIG_ARM_SDE_INTERFACE -__entry_tramp_data___sdei_asm_trampoline_next_handler: +__entry_tramp_data___sdei_asm_handler: .quad __sdei_asm_handler #endif /* CONFIG_ARM_SDE_INTERFACE */ __entry_tramp_data_this_cpu_vector: @@ -1331,7 +1331,7 @@ ENTRY(__sdei_asm_entry_trampoline) */ 1: str x4, [x1, #(SDEI_EVENT_INTREGS + S_ORIG_ADDR_LIMIT)] - tramp_data_read_var x4, __sdei_asm_trampoline_next_handler + tramp_data_read_var x4, __sdei_asm_handler br x4 ENDPROC(__sdei_asm_entry_trampoline) NOKPROBE(__sdei_asm_entry_trampoline) Patches currently in stable-queue which might be from james.morse@xxxxxxx are queue-5.4/arm64-entry-add-vectors-that-have-the-bhb-mitigation.patch queue-5.4/arm64-entry-add-non-kpti-__bp_harden_el1_vectors-for.patch queue-5.4/arm64-use-the-clearbhb-instruction-in-mitigations.patch queue-5.4/arm64-add-percpu-vectors-for-el1.patch queue-5.4/arm64-entry-make-the-trampoline-cleanup-optional.patch queue-5.4/arm64-entry-move-trampoline-macros-out-of-ifdef-d-se.patch queue-5.4/kvm-arm64-add-templates-for-bhb-mitigation-sequences.patch queue-5.4/arm64-add-id_aa64isar2_el1-sys-register.patch queue-5.4/arm64-add-neoverse-n2-cortex-a710-cpu-part-definitio.patch queue-5.4/arm64-entry-free-up-another-register-on-kpti-s-tramp.patch queue-5.4/arm64-entry-don-t-assume-tramp_vectors-is-the-start-.patch queue-5.4/arm64-entry-move-the-trampoline-data-page-before-the.patch queue-5.4/arm64-add-part-number-for-arm-cortex-a77.patch queue-5.4/arm64-entry-allow-the-trampoline-text-to-occupy-mult.patch queue-5.4/arm64-mitigate-spectre-style-branch-history-side-cha.patch queue-5.4/arm64-entry-add-macro-for-reading-symbol-addresses-f.patch queue-5.4/arm64-entry.s-add-ventry-overflow-sanity-checks.patch queue-5.4/kvm-arm64-allow-smccc_arch_workaround_3-to-be-discov.patch queue-5.4/fixup-for-arm64-entry-add-macro-for-reading-symbol-address-from-the-trampoline.patch queue-5.4/arm64-entry-make-the-kpti-trampoline-s-kpti-sequence.patch queue-5.4/arm64-proton-pack-report-spectre-bhb-vulnerabilities.patch queue-5.4/arm64-entry-allow-tramp_alias-to-access-symbols-afte.patch queue-5.4/arm64-add-cortex-x2-cpu-part-definition.patch
