This is a note to let you know that I've just added the patch titled
pinctrl: armada-37xx: Correct mpp definitions
to the 4.14-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
pinctrl-armada-37xx-correct-mpp-definitions.patch
and it can be found in the queue-4.14 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.
>From foo@baz Mon Nov 29 01:32:04 PM CET 2021
From: "Marek Behún" <kabel@xxxxxxxxxx>
Date: Wed, 24 Nov 2021 23:49:29 +0100
Subject: pinctrl: armada-37xx: Correct mpp definitions
To: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>, Sasha Levin <sashal@xxxxxxxxxx>
Cc: pali@xxxxxxxxxx, stable@xxxxxxxxxxxxxxx, "Marek Behún" <marek.behun@xxxxxx>, "Gregory CLEMENT" <gregory.clement@xxxxxxxxxxx>, "Miquel Raynal" <miquel.raynal@xxxxxxxxxxx>, "Linus Walleij" <linus.walleij@xxxxxxxxxx>, "Marek Behún" <kabel@xxxxxxxxxx>
Message-ID: <20211124224933.24275-21-kabel@xxxxxxxxxx>
From: Marek Behún <marek.behun@xxxxxx>
commit 823868fceae3bac07cf5eccb128d6916e7a5ae9d upstream.
This is a cleanup and fix of the patch by Ken Ma <make@xxxxxxxxxxx>.
Fix the mpp definitions according to newest revision of the
specification:
- northbridge:
fix pmic1 gpio number to 7
fix pmic0 gpio number to 6
- southbridge
split pcie1 group bit mask to BIT(5) and BIT(9)
fix ptp group bit mask to BIT(11) | BIT(12) | BIT(13)
add smi group with bit mask BIT(4)
[gregory: split the pcie group in 2, as at hardware level they can be
configured separately]
Signed-off-by: Marek Behún <marek.behun@xxxxxx>
Signed-off-by: Gregory CLEMENT <gregory.clement@xxxxxxxxxxx>
Tested-by: Miquel Raynal <miquel.raynal@xxxxxxxxxxx>
Signed-off-by: Linus Walleij <linus.walleij@xxxxxxxxxx>
Signed-off-by: Marek Behún <kabel@xxxxxxxxxx>
Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>
---
Documentation/devicetree/bindings/pinctrl/marvell,armada-37xx-pinctrl.txt | 18 +++++++---
drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 10 +++--
2 files changed, 19 insertions(+), 9 deletions(-)
--- a/Documentation/devicetree/bindings/pinctrl/marvell,armada-37xx-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/marvell,armada-37xx-pinctrl.txt
@@ -58,11 +58,11 @@ group pwm3
- functions pwm, gpio
group pmic1
- - pin 17
+ - pin 7
- functions pmic, gpio
group pmic0
- - pin 16
+ - pin 6
- functions pmic, gpio
group i2c2
@@ -112,17 +112,25 @@ group usb2_drvvbus1
- functions drvbus, gpio
group sdio_sb
- - pins 60-64
+ - pins 60-65
- functions sdio, gpio
group rgmii
- - pins 42-55
+ - pins 42-53
- functions mii, gpio
group pcie1
- - pins 39-40
+ - pins 39
+ - functions pcie, gpio
+
+group pcie1_clkreq
+ - pins 40
- functions pcie, gpio
+group smi
+ - pins 54-55
+ - functions smi, gpio
+
group ptp
- pins 56-58
- functions ptp, gpio
--- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
+++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
@@ -157,8 +157,8 @@ static struct armada_37xx_pin_group arma
PIN_GRP_GPIO("pwm1", 12, 1, BIT(4), "pwm"),
PIN_GRP_GPIO("pwm2", 13, 1, BIT(5), "pwm"),
PIN_GRP_GPIO("pwm3", 14, 1, BIT(6), "pwm"),
- PIN_GRP_GPIO("pmic1", 17, 1, BIT(7), "pmic"),
- PIN_GRP_GPIO("pmic0", 16, 1, BIT(8), "pmic"),
+ PIN_GRP_GPIO("pmic1", 7, 1, BIT(7), "pmic"),
+ PIN_GRP_GPIO("pmic0", 6, 1, BIT(8), "pmic"),
PIN_GRP_GPIO("i2c2", 2, 2, BIT(9), "i2c"),
PIN_GRP_GPIO("i2c1", 0, 2, BIT(10), "i2c"),
PIN_GRP_GPIO("spi_cs1", 17, 1, BIT(12), "spi"),
@@ -182,8 +182,10 @@ static struct armada_37xx_pin_group arma
PIN_GRP_GPIO("usb2_drvvbus1", 1, 1, BIT(1), "drvbus"),
PIN_GRP_GPIO("sdio_sb", 24, 6, BIT(2), "sdio"),
PIN_GRP_GPIO("rgmii", 6, 12, BIT(3), "mii"),
- PIN_GRP_GPIO("pcie1", 3, 2, BIT(4), "pcie"),
- PIN_GRP_GPIO("ptp", 20, 3, BIT(5), "ptp"),
+ PIN_GRP_GPIO("smi", 18, 2, BIT(4), "smi"),
+ PIN_GRP_GPIO("pcie1", 3, 1, BIT(5), "pcie"),
+ PIN_GRP_GPIO("pcie1_clkreq", 4, 1, BIT(9), "pcie"),
+ PIN_GRP_GPIO("ptp", 20, 3, BIT(11) | BIT(12) | BIT(13), "ptp"),
PIN_GRP("ptp_clk", 21, 1, BIT(6), "ptp", "mii"),
PIN_GRP("ptp_trig", 22, 1, BIT(7), "ptp", "mii"),
PIN_GRP_GPIO_3("mii_col", 23, 1, BIT(8) | BIT(14), 0, BIT(8), BIT(14),
Patches currently in stable-queue which might be from kabel@xxxxxxxxxx are
queue-4.14/pci-aardvark-move-pcie-reset-card-code-to-advk_pcie_train_link.patch
queue-4.14/pci-aardvark-introduce-an-advk_pcie_valid_device-helper.patch
queue-4.14/pci-aardvark-update-comment-about-disabling-link-training.patch
queue-4.14/pci-aardvark-train-link-immediately-after-enabling-training.patch
queue-4.14/arm64-dts-marvell-armada-37xx-declare-pcie-reset-pin.patch
queue-4.14/pci-aardvark-replace-custom-macros-by-standard-linux-pci_regs.h-macros.patch
queue-4.14/pci-aardvark-fix-a-leaked-reference-by-adding-missing-of_node_put.patch
queue-4.14/pci-aardvark-fix-pcie-max-payload-size-setting.patch
queue-4.14/pinctrl-armada-37xx-correct-pwm-pins-definitions.patch
queue-4.14/arm64-dts-marvell-armada-37xx-set-pcie_reset_pin-to-gpio-function.patch
queue-4.14/pci-aardvark-configure-pcie-resources-from-ranges-dt-property.patch
queue-4.14/pci-aardvark-improve-link-training.patch
queue-4.14/pci-aardvark-fix-link-training.patch
queue-4.14/pci-aardvark-fix-checking-for-link-up-via-ltssm-state.patch
queue-4.14/pci-aardvark-issue-perst-via-gpio.patch
queue-4.14/pinctrl-armada-37xx-correct-mpp-definitions.patch
queue-4.14/pci-add-pci_exp_lnkctl2_tls-macros.patch
queue-4.14/pci-aardvark-wait-for-endpoint-to-be-ready-before-training-link.patch
queue-4.14/pinctrl-armada-37xx-add-missing-pin-pcie1-wakeup.patch
queue-4.14/pci-aardvark-fix-compilation-on-s390.patch
queue-4.14/pci-aardvark-fix-i-o-space-page-leak.patch
queue-4.14/pci-aardvark-don-t-touch-pcie-registers-if-no-card-connected.patch
queue-4.14/pci-aardvark-remove-pcie-outbound-window-configuration.patch
queue-4.14/pci-aardvark-indicate-error-in-val-when-config-read-fails.patch
