This is a note to let you know that I've just added the patch titled MIPS: math-emu: Fix BC1{EQ,NE}Z emulation to the 4.4-stable tree which can be found at: http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary The filename of the patch is: mips-math-emu-fix-bc1-eq-ne-z-emulation.patch and it can be found in the queue-4.4 subdirectory. If you, or anyone else, feels it should not be added to the stable tree, please let <stable@xxxxxxxxxxxxxxx> know about it. >From 93583e178ebfdd2fadf950eef1547f305cac12ca Mon Sep 17 00:00:00 2001 From: Paul Burton <paulburton@xxxxxxxxxx> Date: Thu, 21 Apr 2016 14:04:45 +0100 Subject: MIPS: math-emu: Fix BC1{EQ,NE}Z emulation From: Paul Burton <paul.burton@xxxxxxxxxx> commit 93583e178ebfdd2fadf950eef1547f305cac12ca upstream. The conditions for branching when emulating the BC1EQZ & BC1NEZ instructions were backwards, leading to each of those instructions being treated as the other. Fix this by reversing the conditions, and clear up the code a little for readability & checkpatch. Fixes: c909ca718e8f ("MIPS: math-emu: Emulate missing BC1{EQ,NE}Z instructions") Signed-off-by: Paul Burton <paul.burton@xxxxxxxxxx> Reviewed-by: James Hogan <james.hogan@xxxxxxxxxx> Cc: Maciej W. Rozycki <macro@xxxxxxxxxx> Cc: linux-mips@xxxxxxxxxxxxxx Cc: linux-kernel@xxxxxxxxxxxxxxx Patchwork: https://patchwork.linux-mips.org/patch/13150/ Signed-off-by: Ralf Baechle <ralf@xxxxxxxxxxxxxx> Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx> --- arch/mips/math-emu/cp1emu.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) --- a/arch/mips/math-emu/cp1emu.c +++ b/arch/mips/math-emu/cp1emu.c @@ -975,9 +975,10 @@ static int cop1Emulate(struct pt_regs *x struct mm_decoded_insn dec_insn, void *__user *fault_addr) { unsigned long contpc = xcp->cp0_epc + dec_insn.pc_inc; - unsigned int cond, cbit; + unsigned int cond, cbit, bit0; mips_instruction ir; int likely, pc_inc; + union fpureg *fpr; u32 __user *wva; u64 __user *dva; u32 wval; @@ -1189,14 +1190,14 @@ emul: return SIGILL; cond = likely = 0; + fpr = ¤t->thread.fpu.fpr[MIPSInst_RT(ir)]; + bit0 = get_fpr32(fpr, 0) & 0x1; switch (MIPSInst_RS(ir)) { case bc1eqz_op: - if (get_fpr32(¤t->thread.fpu.fpr[MIPSInst_RT(ir)], 0) & 0x1) - cond = 1; + cond = bit0 == 0; break; case bc1nez_op: - if (!(get_fpr32(¤t->thread.fpu.fpr[MIPSInst_RT(ir)], 0) & 0x1)) - cond = 1; + cond = bit0 != 0; break; } goto branch_common; Patches currently in stable-queue which might be from paulburton@xxxxxxxxxx are queue-4.4/mips-math-emu-fix-bc1-eq-ne-z-emulation.patch queue-4.4/mips-smp-cps-stop-printing-ejtag-exceptions-to-uart.patch queue-4.4/mips-fix-bc1-eq-ne-z-return-offset-calculation.patch queue-4.4/mips-math-emu-fix-m-add-sub-.s-shifts.patch