This is a note to let you know that I've just added the patch titled MIPS: KVM: Fix translation of MFC0 ErrCtl to the 4.4-stable tree which can be found at: http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary The filename of the patch is: mips-kvm-fix-translation-of-mfc0-errctl.patch and it can be found in the queue-4.4 subdirectory. If you, or anyone else, feels it should not be added to the stable tree, please let <stable@xxxxxxxxxxxxxxx> know about it. >From 66ffc50c480e7ab6ad5642f47276435a8873c31a Mon Sep 17 00:00:00 2001 From: James Hogan <jhogan@xxxxxxxxxx> Date: Wed, 15 Jun 2016 19:29:45 +0100 Subject: MIPS: KVM: Fix translation of MFC0 ErrCtl MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From: James Hogan <james.hogan@xxxxxxxxxx> commit 66ffc50c480e7ab6ad5642f47276435a8873c31a upstream. The MIPS KVM dynamic translation is meant to translate "MFC0 rt, ErrCtl" instructions into "ADD rt, zero, zero" to zero the destination register, however the rt register number was copied into rt of the ADD instruction encoding, which is the 2nd source operand. This results in "ADD zero, zero, rt" which is a no-op, so only the first execution of each such MFC0 from ErrCtl will actually read 0. Fix the shift to put the rt from the MFC0 encoding into the rd field of the ADD. Fixes: 50c8308538dc ("KVM/MIPS32: Binary patching of select privileged instructions.") Signed-off-by: James Hogan <james.hogan@xxxxxxxxxx> Cc: Paolo Bonzini <pbonzini@xxxxxxxxxx> Cc: Radim Krčmář <rkrcmar@xxxxxxxxxx> Cc: Ralf Baechle <ralf@xxxxxxxxxxxxxx> Cc: linux-mips@xxxxxxxxxxxxxx Cc: kvm@xxxxxxxxxxxxxxx Signed-off-by: Paolo Bonzini <pbonzini@xxxxxxxxxx> Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx> --- arch/mips/kvm/dyntrans.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) --- a/arch/mips/kvm/dyntrans.c +++ b/arch/mips/kvm/dyntrans.c @@ -82,7 +82,7 @@ int kvm_mips_trans_mfc0(uint32_t inst, u if ((rd == MIPS_CP0_ERRCTL) && (sel == 0)) { mfc0_inst = CLEAR_TEMPLATE; - mfc0_inst |= ((rt & 0x1f) << 16); + mfc0_inst |= ((rt & 0x1f) << 11); } else { mfc0_inst = LW_TEMPLATE; mfc0_inst |= ((rt & 0x1f) << 16); Patches currently in stable-queue which might be from jhogan@xxxxxxxxxx are queue-4.4/mips-ptrace-drop-cp0_tcstatus-from-regoffset_table.patch queue-4.4/mips-fix-htw-config-on-xpa-kernel-without-lpa-enabled.patch queue-4.4/mips-fix-64-bit-htw-configuration.patch queue-4.4/mips-perf-fix-i6400-event-numbers.patch queue-4.4/mips-kvm-fix-translation-of-mfc0-errctl.patch queue-4.4/mips-fix-little-endian-micromips-msa-encodings.patch queue-4.4/mips-define-at_vector_size_arch-for-arch_dlinfo.patch queue-4.4/mips-smp-update-cpu_foreign_map-on-cpu-disable.patch queue-4.4/mips-c-r4k-fix-protected_writeback_scache_line-for-eva.patch